Integration challenges at 0.15-um technology node

Farhad Moghadam

doi:10.1117/12.360550

1 September 1999 Integration challenges at 0.15-μm technology node

Farhad Moghadam

Proceedings Volume 3881, Microelectronic Device Technology III; (1999) https://doi.org/10.1117/12.360550
Event: Microelectronic Manufacturing '99, 1999, Santa Clara, CA, United States

Abstract

The latest National Technology Roadmap for Semiconductors (NTRS) shows the most aggressive trend in IC performance advancements to date. However, the NTRS projects a course that is two to three years ahead of current industry capabilities. This discrepancy is due to the unprecedented number of new materials being introduced - transmissions that typically require five to ten years of R and D and significant modifications to IC manufacturing environments. CLearly, the challenges presented by these accelerated material changes could greatly impact product quality and reliability. This paper addresses integration complexity and capacitance issues, plus the new algorithms, design techniques, and system and chip architectures needed to meet the technology milestones dictated by the NTRS. A fundamental understanding of the new materials and processes, combined with high-productivity tools, such as the Producer mainframe, will be required to enable optimized front and back end processing.

Citation Download Citation

Farhad Moghadam "Integration challenges at 0.15-μm technology node", Proc. SPIE 3881, Microelectronic Device Technology III, (1 September 1999); https://doi.org/10.1117/12.360550

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