27 August 1999 Frequency distribution modeling for high-speed microprocessors using on-chip ring oscillators
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It is critical for success in the microprocessor business to understand the relationship between yield and speed- performance. This paper outlines a method for modeling device speed distribution and yield using on-chip ring-oscillator measurements. The modeling method is used in production on the UltraSPARCTM-II family of microprocessors. Lot-level speed distributions are predicted within 10% by speed-bin and quarterly distributions within 5% by speed-bin. Graphs are generated to show the relationship between business and process concerns.
© (1999) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
John M. Carulli, John M. Carulli, Derek C. Wrobbel, Derek C. Wrobbel, Aswin Mehta, Aswin Mehta, Kenneth E. Krause, Kenneth E. Krause, Brad E. Campbell, Brad E. Campbell, Fred A. Valente, Fred A. Valente, } "Frequency distribution modeling for high-speed microprocessors using on-chip ring oscillators", Proc. SPIE 3884, In-Line Methods and Monitors for Process and Yield Improvement, (27 August 1999); doi: 10.1117/12.361341; https://doi.org/10.1117/12.361341

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