27 April 2000 Novel photonic ATM switching architecture based on free-space optical interconnect
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Proceedings Volume 3952, Optoelectronic Interconnects VII; Photonics Packaging and Integration II; (2000) https://doi.org/10.1117/12.384405
Event: Symposium on Integrated Optoelectronics, 2000, San Jose, CA, United States
Abstract
A growable multistage ATM switching architecture based on optical interconnect is presented in this paper. The interconnect stage, core of the 3 stages architecture, is composed of 16 by 16 CMOS-SEED optoelectronical hybrid ATM switching modules. Since the interconnect stage is memory- less, electronic buffers are provided in the output concentrator stage, and the buffers are partial shared to be used effectively. Optical interconnects between the pair- input expansion stage and the interconnect stage, also the interconnect stage and the output concentrator stage provide high-speed data paths, for example 622Mb/s or 2.4 Gb/s. Both the with lower speed control signal and the complicated logical processing are carried out in the electronic devices. With 64 ports of OC-12 interface, the maximum throughput of the prototype system is about 40 gigabits per second, an the packet loss ratio of this ATM switching system is less than 10e-9. Taking advantages of high speed of the optical interconnect and the high density, flexible logical processing of the electronic devices, the ATM switching of the optical interconnect and the high density, flexible logical processing of the electronic devices, the ATM switching system has favorable potential to scale easily to very large network size, for example 256 ports of OC-48 interface.
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Zhixiang Luo, Zhixiang Luo, Mingcui Cao, Mingcui Cao, Yuan Li, Yuan Li, Jiangdong Wu, Jiangdong Wu, Qiaoyan Hu, Qiaoyan Hu, } "Novel photonic ATM switching architecture based on free-space optical interconnect", Proc. SPIE 3952, Optoelectronic Interconnects VII; Photonics Packaging and Integration II, (27 April 2000); doi: 10.1117/12.384405; https://doi.org/10.1117/12.384405
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