A digital programmable retina is a functional extension of a CMOS imager, in which every pixel is fitted with a tiny digital programmable processor. We actually call it a PAR, standing for Programmable Artificial Retina. From an architectural viewpoint, a PAR is a SIMD array processor with local optical input. A PAR is aimed at processing images on-site (where they are sensed) until they can be output from the array under concentrated form. The overall goal is to get compact, fast and inexpensive vision systems, e.g. for robotics applications. PAR design is subject to harsh constraints resulting from small pixel area and sensing/processing cohabitation. Meeting these constraints leads to using peculiar architectural and circuit technique solutions. In the last three generations of PARs we have designed, semi-static shift registers have played a crucial role in the maximization of computational power versus silicon area. In particular, the latter have been used to store, shift and--through some slight modifications--to perform local computations on images. Here, we show their abilities to support asynchronous propagation in order to implement `geodesic reconstruction', an extremely useful computational operator, in particular for image segmentation and then for object selection and manipulation purposes.