3 February 2000 Lithography and CD performance of advanced MEBES mask pattern generators
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Proceedings Volume 3996, 16th European Conference on Mask Technology for Integrated Circuits and Microcomponents; (2000) https://doi.org/10.1117/12.377110
Event: 16th European Conference on Mask Technology for Integrated Circuits and Microcomponents, 1999, Munich, Germany
Abstract
As optical lithography is extended to the 130 nm generation and beyond, demanding requirements are placed on mask pattern generators to produce quartz substrate masks. This paper reports on the lithography and critical dimension (CD) performance of the MEBES 5500 mask pattern generator. Compared to previous MEBES tools, this system employs a new high-dose electron gun and column design. We summarize experiments relating lithographic quality to increased dose and the effects of spot size on lithography. Methods to reduce beam-induced pattern placement errors are reviewed. A new graybeam writing strategy, Multipass Gray-II, is described in detail. This strategy creates eight dosed gray levels and provides increased writing throughput (up to 8X compared to single-pass printing) without loss of lithographic quality. These experiments are performed with ZEP 7000 resist and dry etch process; improvements in CD control have been achieved by optimizing the process. A consequence of the improvement in CD control and throughput is improved productivity in generating 180 nm devices.
© (2000) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jan M. Chabala, Jan M. Chabala, Damon M. Cole, Damon M. Cole, Henry Thomas Pearce-Percy, Henry Thomas Pearce-Percy, Wayne Phillips, Wayne Phillips, Maiying Lu, Maiying Lu, Suzanne Weaver, Suzanne Weaver, David W. Alexander, David W. Alexander, T. Coleman, T. Coleman, Charles A. Sauer, Charles A. Sauer, Frank E. Abboud, Frank E. Abboud, } "Lithography and CD performance of advanced MEBES mask pattern generators", Proc. SPIE 3996, 16th European Conference on Mask Technology for Integrated Circuits and Microcomponents, (3 February 2000); doi: 10.1117/12.377110; https://doi.org/10.1117/12.377110
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