0.12-um logic process using a 248-nm step-and-scan system

Daniel Claire Baker; Tammy Zheng; Clifford H. Takemoto; Satyendra S. Sethi; Calvin Gabriel; Gregory S. Scott

doi:10.1117/12.388313

23 June 2000 0.12-μm logic process using a 248-nm step-and-scan system

Daniel Claire Baker, Tammy Zheng, Clifford H. Takemoto, Satyendra S. Sethi, Calvin Gabriel, Gregory S. Scott

Proceedings Volume 3999, Advances in Resist Technology and Processing XVII; (2000) https://doi.org/10.1117/12.388313
Event: Microlithography 2000, 2000, Santa Clara, CA, United States

Abstract

Through the use of an optimized 248 nm optical lithography process and an in-situ resist trimming step developed as part of the gate layer etch, we have been able to fabricate 0.12 micron logic gates with acceptable manufacturing process latitudes. The resist trimming step is performed just prior to etching the SiON anti-reflective coating layer. Because the trimming step is done in-situ as part of the gate etch process, the impact on throughput is minimal. The resist trimming process allows the printing of features larger than the target width, increasing the photolithography process latitude by allowing the process to be run at the most optimal conditions. The trimming step also reduces the line edge roughness which is commonly seen for many chemically amplified photoresists. Photolithography process latitudes with and without trimming are compared for on-wafer dimensions of 0.15 and 0.12 micron. The effect of the trimming step on intrawafer critical dimension control is quantified, and electrical performance of the transistors is presented. The extendibility of this technique for 0.10 micron features is presented. Empirical results are compared to PROLITH simulations, and results of a feasibility study for 193 nm lithography are included.

Citation Download Citation

Daniel Claire Baker, Tammy Zheng, Clifford H. Takemoto, Satyendra S. Sethi, Calvin Gabriel, and Gregory S. Scott "0.12-μm logic process using a 248-nm step-and-scan system", Proc. SPIE 3999, Advances in Resist Technology and Processing XVII, (23 June 2000); https://doi.org/10.1117/12.388313

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available