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5 July 2000 Process capability analysis of DUV alternating PSM and DUV attenuated PSM lithography for 100-nm gate fabrication
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Abstract
Two lithography strategies - of alternating PSM using double expose method (DEM) and high transmission attenuated PSM - were investigated to assess their capability for printing 0.1 micrometers gate. In order to do that, the optimization of each process has been carried out for maximizing the process window; of depth of focus (DOF) and expose latitude (EL), to make them satisfy process requirement generated by focus and expose budget study. The key components of optimization are finding the best NA and sigma, the optimum bias for isolated lines and dense lines and the optimum transmission of att PSM. Then, the impacts of some critical lithographic parameters such as phase error effects in APSM, proximity effects and mask error factor (MEF) were determined with experimental data. As final answer to the question of process capability of two lithography techniques for 0.1 micrometers gate patterning, CD control analysis was made to see if they satisfy our gate CD control requirements.
© (2000) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Keeho Kim, Mark E. Mason, John N. Randall, and Won D. Kim "Process capability analysis of DUV alternating PSM and DUV attenuated PSM lithography for 100-nm gate fabrication", Proc. SPIE 4000, Optical Microlithography XIII, (5 July 2000); https://doi.org/10.1117/12.388957
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