This investigation presents a novel type of DOEs fabricated by the conventional CMOS process. A simple post-CMOS process is applied to form the relief pattern, which can be used directly for its optical properties or serve as a mold for the subsequent replication. By using the CMOS process, in addition to reducing the depth, alignment, dimension, and shape errors of the pattern, the scale is minimized by the advancing microfabrication as well. The performance of arbitrary DOEs can be directly related to the diffraction efficiency of the gratings. Therefore, in this investigation, the shape of the multi-level gratings is designed and the diffraction efficiency is calculated by the rigorous vector coupled-wave analysis. The largest constraint of the CMOS process for the multilevel gratings is that the depth of each layer is different and unchangeable. However, a suitable length for each level can be determined and, in doing so, the diffraction efficiency can reach 81%.