13 November 2000 Combined unsigned and two's complement saturating multipliers
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Abstract
In many digital signal processing and multimedia applications, results that overflow are saturated to the most positive or most negative representable number. This paper presents efficient techniques for performing saturating n-bit integer multiplication on unsigned and two's complement numbers. Unlike conventional techniques for saturating multiplication, which compute a 2n-bit product and then examine the n most significant product bits to determine if overflow has occurred, the techniques presented in this paper compute only the (n + 1) least significant bits of the product. Specialized overflow detection units, which operate in parallel with the multiplier, determine if overflow has occurred and the product should be saturated. These techniques are applied to designs for saturating array multipliers that perform either unsigned or two's complement saturating integer multiplication, based on an input control signal. Compared to array multipliers that use conventional methods for saturation, these multipliers have about half as much area and delay.
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Michael J. Schulte, Mustafa Gok, Pablo I. Balzola, Robert W. Brocato, "Combined unsigned and two's complement saturating multipliers", Proc. SPIE 4116, Advanced Signal Processing Algorithms, Architectures, and Implementations X, (13 November 2000); doi: 10.1117/12.406496; https://doi.org/10.1117/12.406496
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