High-performance fine-grained pipelined LMS algorithm in Virtex FPGA

Lok-Kee Ting; Roger F. Woods; Colin F. N. Cowan; P. R. Cork; C. L.J. Sprigings

doi:10.1117/12.406507

13 November 2000 High-performance fine-grained pipelined LMS algorithm in Virtex FPGA

Lok-Kee Ting, Roger F. Woods, Colin F. N. Cowan, P. R. Cork, C. L.J. Sprigings

Proceedings Volume 4116, Advanced Signal Processing Algorithms, Architectures, and Implementations X; (2000) https://doi.org/10.1117/12.406507
Event: International Symposium on Optical Science and Technology, 2000, San Diego, CA, United States

Abstract

This paper presents the design, implementation, and verification of fine-grained pipelined Least-Mean-Square (LMS) adaptive Finite- Impulse-Response (FIR) filters in Virtex FPGA technology. The paper focuses on the impact of introducing pipelining into the LMS filter. While pipelining provides a speed increase, the additional effect is to introduce delay into the error feedback loop which degrades performance. This effect is overcome through the use of look-ahead and delayed LMS based algorithms. In addition, the paper shows that FPGA technology, such as the Virtex FPGA is an ideal platform for this implementation, as the costs of pipelining are offset by the availability of high levels of flip flops within the FPGA architecture. A pipelined momentum LMS algorithm is identified, which is considered to offer a better convergence behavior and tracking capability than the pipelined LMS algorithm. Detailed performance results including area and timing figures based on actual FPGA layout are given.

Citation Download Citation

Lok-Kee Ting, Roger F. Woods, Colin F. N. Cowan, P. R. Cork, and C. L.J. Sprigings "High-performance fine-grained pipelined LMS algorithm in Virtex FPGA", Proc. SPIE 4116, Advanced Signal Processing Algorithms, Architectures, and Implementations X, (13 November 2000); https://doi.org/10.1117/12.406507

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