As geometries continue to shrink and the equipment is pushed closer to its true limits, overlay and other printing parameters become a larger part of the total budget. Overlay and CD measurements are sampled 'in line' to track and target tools. Adding these parameters to the electrically tested database along with sort data improves yield correlation and failure analysis both during development and in manufacturing. Typically electrical alignment structures such as a resistor divider work well for a few layers but are limited to layers connecting to resistor elements. This paper describes a novel resistor ladder structure that can measure alignment between any 2 conducting layers as well as measure tip pullback, layer to layer patterning impacts, and other characteristics in real device type layouts. Only mask generation and wafer printing capabilities limit the accuracy of the measurement.