23 August 2000 Subresolution process windows and yield estimation technique based on detailed full-chip CD simulation
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Proceedings Volume 4182, Process Control and Diagnostics; (2000); doi: 10.1117/12.410096
Event: Microelectronic Manufacturing, 2000, Santa Clara, CA, United States
Abstract
Conventional methods of CD-limited yield and process capability analysis either completely ignore the intra-die CD variability caused by the optical and process proximity effects or assume it is normally distributed. We show that these assumptions do not hold for the aggressive subresolution designs. The form and modality of intra-die poly-gate CD variability strongly depend on the defocus and exposure values. We study the influence of process parameters on strong phase shifted and binary mask designs. A definition of a CD-based process window is proposed to capture the 'proximity signature' of the design and its dependence on process parameters.
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Yuri Granik, Nicolas B. Cobb, Emile Y. Sahouria, Olivier Toublan, Luigi Capodieci, Robert John Socha, "Subresolution process windows and yield estimation technique based on detailed full-chip CD simulation", Proc. SPIE 4182, Process Control and Diagnostics, (23 August 2000); doi: 10.1117/12.410096; https://doi.org/10.1117/12.410096
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KEYWORDS
Binary data

Critical dimension metrology

Optical proximity correction

Cadmium

Statistical analysis

Photomasks

Lithography

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