17 April 2001 8-channel parallel readout high-speed wide dynamic range CCD
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Proceedings Volume 4183, 24th International Congress on High-Speed Photography and Photonics; (2001) https://doi.org/10.1117/12.424268
Event: 24th International Congress on High-Speed Photography and Photonics, 2000, Sendai, Japan
Abstract
An 8 channel parallel readout CCD image sensor for high-speed imaging has been developed. The image area of this sensor is divided into 8 rectangular blocks, and the data of each block is read out through an independent amplifier. In the area where there is not photediode (PD) beside VCCD, the space of VCCDs is narrowed down to a HCCD block that is placed at the end of VCCDs, and amplifiers and their peripheral circuits are placed between the spaces of two HCCD blocks with parallel to makes amplifier properties uniform across channels. For VCCD high-speed transfer, VCCD bus line structure is used and VCCD slant structure is optimized by the computer 3D simulation. The pixel size is designed to be 11.5 micrometers X 11.5 micrometers , and amplifiers are placed close to FDA (Floating Diffusion Amplifier) with VCCD slant structure, which realized high sensitivity and large saturation.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yasuhiro Morinaka, Yasuhiro Morinaka, Hiroyoshi Komobuchi, Hiroyoshi Komobuchi, } "8-channel parallel readout high-speed wide dynamic range CCD", Proc. SPIE 4183, 24th International Congress on High-Speed Photography and Photonics, (17 April 2001); doi: 10.1117/12.424268; https://doi.org/10.1117/12.424268
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