17 April 2001 High-speed videography system using a pair of imagers for biological applications
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Proceedings Volume 4183, 24th International Congress on High-Speed Photography and Photonics; (2001) https://doi.org/10.1117/12.424258
Event: 24th International Congress on High-Speed Photography and Photonics, 2000, Sendai, Japan
Abstract
This paper describes a high-speed imaging system using dual MOS-based solid-state cameras and its biological application. Our dual camera system can capture images synchronously and produce sets of 64 X 64-pixel images at a rate of 0.6 ms/frame. The system is composed of three blocks: the 'camera- drive,' 'memory,' and 'processor' blocks. We developed these block hardware circuits using an FPGA device in the following manner. (1) Camera-drive block: two cameras were synchronized with the Hd (horizontal drive) and Vd (vertical drive) signals using a 16 MHz clock. (2) Memory block: 12-bit track-and-hold A/D converters were used to digitize the output from both cameras in parallel and store it in frame memory. Each camera had a 16-MB memory capacity. (3) Processor block: image data from both cameras was stored in two separate frame memories. This block simultaneously accessed the same memory address for each frame and calculated the difference in the observed values, which was then transferred to a personal computer. This system enables us to observe pure neural activity from images contaminated with heartbeat noise.
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Riichi Kajiwara, Riichi Kajiwara, Ichiro Takashima, Ichiro Takashima, Kiyo Murano, Kiyo Murano, Yuka Mimura, Yuka Mimura, Toshio Iijima, Toshio Iijima, } "High-speed videography system using a pair of imagers for biological applications", Proc. SPIE 4183, 24th International Congress on High-Speed Photography and Photonics, (17 April 2001); doi: 10.1117/12.424258; https://doi.org/10.1117/12.424258
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