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24 October 2000 Interconnection optimization during high-level synthesis of digital systems
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Proceedings Volume 4228, Design, Modeling, and Simulation in Microelectronics; (2000) https://doi.org/10.1117/12.405401
Event: International Symposium on Microelectronics and Assembly, 2000, Singapore, Singapore
Abstract
With increasing design complexity of digital systems and small device features in sub-micron technologies, interconnection in the digital systems becomes more significant. In this paper, a technique for data path allocation aiming at interconnection optimization is presented. Not only can it optimize the interconnections of the design, but also it enables designers to balance the register cost and interconnection cost. Experimental test results show that this technique can produce good designs.
© (2000) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hongwei Zhu, Ching Chuen Jong, and Yu Hong Zheng "Interconnection optimization during high-level synthesis of digital systems", Proc. SPIE 4228, Design, Modeling, and Simulation in Microelectronics, (24 October 2000); https://doi.org/10.1117/12.405401
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