27 April 2001 Real-time FPGA-based architecture for stereo vision
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In this paper, an FPGA based architecture for stereo vision is discussed. The architecture provides a high-density disparity map in real time. The architecture is based on area comparison between the image pair using the sum of absolute differences. The architecture scans the input images in partial columns which are then processed in parallel. The system performs monolithically on a pair images in real time. The purpose of the system is to be integrated ins smart camera for real-time image analysis based on FPGA processing.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Miguel Arias-Estrada, Miguel Arias-Estrada, Juan M. Xicotencatl, Juan M. Xicotencatl, "Real-time FPGA-based architecture for stereo vision", Proc. SPIE 4303, Real-Time Imaging V, (27 April 2001); doi: 10.1117/12.424957; https://doi.org/10.1117/12.424957


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