15 May 2001 Megapixel CMOS imager with charge binning
Author Affiliations +
Abstract
An active pixel sensor array (APS) with programmable resolution was realized in standard 0.5 micrometers CMOS technology. For operation under poor lighting conditions, the change of sub-regions of 2 by 2 respectively 4 by 4 pixels can be summed, yielding a corresponding sensitivity enhancement. In that way the maximum resolution of 1024 by 1024 can be reduced to 512 by 512 or 256 by 256. Based on a charge skimming mechanism, the required circuitry can be implemented in any logic CMOS technology without process modifications. Output through 1, 2 or 4 analog channels clocked at a pixel at up to 40 MHz each allows a frame rate up to 160 frames/sec at an overall power dissipation of 70 mW.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Stefan C. Lauxtermann, Stefan C. Lauxtermann, Alice Biber, Alice Biber, Peter Schwider, Peter Schwider, Peter Metzler, Peter Metzler, Peter Seitz, Peter Seitz, Reiner Bidenbach, Reiner Bidenbach, } "Megapixel CMOS imager with charge binning", Proc. SPIE 4306, Sensors and Camera Systems for Scientific, Industrial, and Digital Photography Applications II, (15 May 2001); doi: 10.1117/12.426944; https://doi.org/10.1117/12.426944
PROCEEDINGS
8 PAGES


SHARE
RELATED CONTENT

A 33M pixel wide color gamut image capturing system using...
Proceedings of SPIE (February 18 2013)
Arc-section annular folded optic imager
Proceedings of SPIE (September 13 2007)
High-speed camera based on a CMOS active pixel sensor
Proceedings of SPIE (February 28 2000)

Back to Top