Architecture for Bezier clipping algorithm

Montserrat Boo; Javier Diaz Bruguera; Emilio Lopez-Zapata

doi:10.1117/12.420801

29 March 2001 Architecture for Bezier clipping algorithm

Montserrat Boo, Javier Diaz Bruguera, Emilio Lopez-Zapata

Proceedings Volume 4313, Media Processors 2001; (2001) https://doi.org/10.1117/12.420801
Event: Photonics West 2001 - Electronic Imaging, 2001, San Jose, CA, United States

Abstract

Ray tracing is a rendering technique for producing high quality and photo-realistic images. The basic requirement for ray tracing a specific geometric primitive is the calculation of intersections between rays and the geometry. Bezier clipping algorithm is a promising technique for computing high quality spline-ray interactions but the slowness of this technique suggests the utilization of specific VLSI architectures. In this paper we present an improved algorithm for Bezier clipping and its VLSI implementation. Specifically, some modifications over the original algorithm have been developed in order to avoid the non-constant number of cycles per iteration and the undesirable and inherent division operations of the original algorithm. As a result, we obtain a regular architecture, characterized by a fixed and optimum scheduling, which minimizes the timing requirements of the Bezier clipping algorithm.

Citation Download Citation

Montserrat Boo, Javier Diaz Bruguera, and Emilio Lopez-Zapata "Architecture for Bezier clipping algorithm", Proc. SPIE 4313, Media Processors 2001, (29 March 2001); https://doi.org/10.1117/12.420801

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