29 March 2001 Processor architecture of MBAP for embedded image understanding system
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Processor's architecture has great effect on the performance of whole processor array. In order to improve the performance of SIMD array architecture, we modified the structure of BAP (bit-serial array processor) processing element based on the BAP128 processor. The array processor chip of modified bit-serial array processor (MBAP in abbreviation) with 0.35 micrometers CMOS technology is designed for embedded image understanding system. This paper not only presents MBAP architecture, but also gives the architecture feature about this design. Toward basic macro instructions and low-level processing algorithms of image understanding, the performance of BAP and MBAP is compared. The result shows that the performance of MBAP has much improvement on BAP, at the cost of increasing 5% chip resource.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Peng Liu, Qingdong Yao, Song Wu, Qiaohai Pan, JinMei Lai, "Processor architecture of MBAP for embedded image understanding system", Proc. SPIE 4313, Media Processors 2001, (29 March 2001); doi: 10.1117/12.420797; https://doi.org/10.1117/12.420797


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