Impact of optimized illumination upon simple lambda-based design rules for low-K1 lithography

Sergei V. Postnikov; Kevin Lucas; Karl Wimmer

doi:10.1117/12.436807

22 August 2001 Impact of optimized illumination upon simple lambda-based design rules for low-K₁ lithography

Sergei V. Postnikov, Kevin Lucas, Karl Wimmer

Proceedings Volume 4344, Metrology, Inspection, and Process Control for Microlithography XV; (2001) https://doi.org/10.1117/12.436807
Event: 26th Annual International Symposium on Microlithography, 2001, Santa Clara, CA, United States

Abstract

The use of low K1 lithography to extend Moore's Law has been shown to have large implications for random logic design rules. In this work we are continuing the analysis of process control and design rule implications of low K1 lithographic systems to include highly optimized illumination and reticle enhancement conditions. Recent 248nm and 193nm lithography results have shown considerable improvements in two-dimensional pattern transfer linearity from optimized off-axis illumination. Due to the public unavailability of leading-edge layout rules (because of their extremely proprietary nature), we are applying our analysis to the simple lambda based design rule system of Mead and Conway. We analyze the impact of K1 and optimization method by comparing the (normalized) area of a typical SRAM bitcell redesigned according to these lambda based rules. The area of the bitcell strongly depends upon the design rules required for each enhancement technique and K1 factor to achieve a manufacturable cell. These area comparisons allow for easy viewing of the cost of pursuing different low K1 strategies. The results of this work are mainly generated from simulation but are backed by experimental verification from recent 193nm tool and process developments.

Citation Download Citation

Sergei V. Postnikov, Kevin Lucas, and Karl Wimmer "Impact of optimized illumination upon simple lambda-based design rules for low-K₁ lithography", Proc. SPIE 4344, Metrology, Inspection, and Process Control for Microlithography XV, (22 August 2001); https://doi.org/10.1117/12.436807

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