26 April 2001 ArF lithography: challenges, resolution capability, and the mask error enhancement function (MEEF)
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Proceedings Volume 4404, Lithography for Semiconductor Manufacturing II; (2001) https://doi.org/10.1117/12.425202
Event: Microelectronic and MEMS Technologies, 2001, Edinburgh, United Kingdom
Abstract
Early insertion of ArF nm lithography will occur at the 130 nm node in 2001. Process development for the 100nm node will also occur this year. Both aggressive gate length reductions and minimum pitch design rules below 250nm present immediate challenges for the new ArF technology. Gate line widths will approach one half of the wavelength of the exposure system.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Marina V. Plat, Christopher F. Lyons, Amada Wilkison, Jeff A. Schefske, Hung-Eil Kim, "ArF lithography: challenges, resolution capability, and the mask error enhancement function (MEEF)", Proc. SPIE 4404, Lithography for Semiconductor Manufacturing II, (26 April 2001); doi: 10.1117/12.425202; https://doi.org/10.1117/12.425202
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