26 April 2001 Low-temperature 193-nm resist reflow process for 100-nm generation contact patterning
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Proceedings Volume 4404, Lithography for Semiconductor Manufacturing II; (2001) https://doi.org/10.1117/12.425231
Event: Microelectronic and MEMS Technologies, 2001, Edinburgh, United Kingdom
Abstract
Manufacturable process windows for the small contact dimensions of the 100nm lithography generation are well beyond the capability of current 193nm resist and exposure tool processes. Even with next generation very high NA 193nm exposure tools, simulations indicate that these contact sizes are not obtainable with standard processing techniques. Therefore, we have investigated the feasibility of using a 193nm resist reflow technique to obtain small contact hole sizes. We have chosen the thin imaging system 2000 of ARCH Chemicals for investigation. This resist provides good process latitudes and excellent etch selectivity and has a much lower Tg compared to single layer 193nm resists. This work will show the impact of resist flow on Focus-Exposure windows, proximity-uniformity, CD- uniformity over the wafer and mask error factor. Additional experimental results will highlight profiles after oxide etch as well as process windows achievable with a 6 percent attenuated phase shift mask.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Veerle Van Driessche, Veerle Van Driessche, Kevin Lucas, Kevin Lucas, Frieda Van Roey, Frieda Van Roey, Grozdan Grozev, Grozdan Grozev, Plamen Tzviatkov, Plamen Tzviatkov, } "Low-temperature 193-nm resist reflow process for 100-nm generation contact patterning", Proc. SPIE 4404, Lithography for Semiconductor Manufacturing II, (26 April 2001); doi: 10.1117/12.425231; https://doi.org/10.1117/12.425231
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