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26 April 2001 Overlay improvement on 0.15-μm production with ASML IOSc (improved overlay scanner) package
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Proceedings Volume 4404, Lithography for Semiconductor Manufacturing II; (2001) https://doi.org/10.1117/12.425234
Event: Microelectronic and MEMS Technologies, 2001, Edinburgh, United Kingdom
Abstract
The alignment accuracy has become a big challenge in sub- micro technology, especially below 0.15um technology. Scanner induced alignment error like RICO effect or WICO effect are big problems for foundry fab overlay control. For improving scanner overlay performance, ASML has provided an overlay improving package, IOSc to solve these issues. IOSc package includes four major parts of hardware improvement. (1) Phase 3 reticle chuck proposes to improve image distortion and overlay. (2) Phase modulators for TTL and Athena propose to reduce RICO effect and WICO effect. (3) Continuous clamping wafer table proposes to minimize wafer distortion. (4) Wafer stage air shower proposes to improve the stage travel stability.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Kun-Yi Liu, S. S. Wang, Y. Y. Chu, and J. C. Hsieh "Overlay improvement on 0.15-μm production with ASML IOSc (improved overlay scanner) package", Proc. SPIE 4404, Lithography for Semiconductor Manufacturing II, (26 April 2001); https://doi.org/10.1117/12.425234
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