5 September 2001 Fabrication of NIST-format x-ray masks with 4-Gb DRAM patterns
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Proceedings Volume 4409, Photomask and Next-Generation Lithography Mask Technology VIII; (2001) https://doi.org/10.1117/12.438365
Event: Photomask and Next Generation Lithography Mask Technology VIII, 2001, Kanagawa, Japan
We fabricated NIST-format x-ray masks containing test patterns for the gate and contact-hole (C/H) levels of 4- Gbit dynamic random access memory (DRAM), and evaluated the image placement (IP) accuracy, critical dimension (CD) control, and other characteristics. Due to precise control of the stress in the TaBN absorber and CrN films and also the high stiffness of the 3micrometers -thick SiC membrane, the reproducibility of the process-induced distortion was better than 10nm. Using the high-precision EB-X3 electron beam (EB) mask writer, the best IP accuracy obtained for a finished gate-level mask was 15nm (3(sigma) ) and its CD uniformity was +/- 6nm in a 24-mm-sq field. The relative IP accuracy of the C/H-level mask with respect to the gate- level mask was 11 nm (3(sigma) ) after magnification correction. These masks are useful for exposure using a 10micrometers gap because the mask surface is convex and the out- of0plane distortion of the membrane is less than 1micrometers . The optical transmittance of the SiC membrane is large enough for the alignment system of the XRA x-ray stepper. The specifications of a 100-nm-node x-ray mask can be met by using the EB-X3 and a TaBN/CrN/SiC/Si/Pyrex x-ray mask structure.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yuusuke Tanaka, Kiyoshi Fujii, Kenichiro Suzuki, Toshiyuki Iwamoto, Shinji Tsuboi, Yasuji Matsui, "Fabrication of NIST-format x-ray masks with 4-Gb DRAM patterns", Proc. SPIE 4409, Photomask and Next-Generation Lithography Mask Technology VIII, (5 September 2001); doi: 10.1117/12.438365; https://doi.org/10.1117/12.438365


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