5 September 2001 Mask process design optimization based on quality mapping using standard mask inspection equipment
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Proceedings Volume 4409, Photomask and Next-Generation Lithography Mask Technology VIII; (2001) https://doi.org/10.1117/12.438374
Event: Photomask and Next Generation Lithography Mask Technology VIII, 2001, Kanagawa, Japan
Abstract
With the advent of system-on-chip (SOC) devices, resolving typical problems of composite designs is getting more urgent. The continuous effort for achieving tighter critical dimension (CD) tolerances together with the known phenomena of pattern density loading makes the mask fidelity issue for SOC technology a unique and prominent issue. The typical characteristic of an SOC with respect to CD control is the diversity of linewidths and pattern density over the chip. This paper presents the metrology software called Linewidth Bias Monitor (LBM) as a method to characterize pattern-loading effects on an SOC.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Shen Chung Kuo, TaiSheng Tan, Anja Rosenbusch, Yair Eran, Ofer Lindman, Gidon Gottlib, "Mask process design optimization based on quality mapping using standard mask inspection equipment", Proc. SPIE 4409, Photomask and Next-Generation Lithography Mask Technology VIII, (5 September 2001); doi: 10.1117/12.438374; https://doi.org/10.1117/12.438374
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