20 November 2001 Adaptive array beamforming with fixed-point arithmetic matrix inversion using Givens rotations
Author Affiliations +
Abstract
Adaptive array systems require the periodic solution of the well-known w=R1v equation in order to compute optimum adaptive array weights. The covariance matrix R is estimated by forming a product of noise sample matrices X:R=XHX. The operations-count cost of performing the required matrix inversion in real time can be prohibitively high for a high bandwidth system with a large number of sensors. Specialized hardware may be required to execute the requisite computations in real time. The choice of algorithm to perform these computations must be considered in conjunction with the hardware technology used to implement the computation engine. A systolic architecture implementation of the Givens rotation method for matrix inversion was selected to perform adaptive weight computation. The bit-level systolic approach enables a simple ASIC design and a very low power implementation. The bit-level systolic architecture must be implemented with fixed-point arithmetic to simplify the propagation of data through the computation cells. The Givens rotation approach has a highly parallel implementation and is ideally suited for a systolic implementation. Additionally, the adaptive weights are computed directly from the sample matrix X in the voltage domain, thus reducing the required dynamic range needed in carrying out the computations. An analysis was performed to determine the required fixed-point precision needed to compute the weights for an adaptive array system operating in the presence of interference. Based on the analysis results, it was determined that the precision of a floating-point computation can be well approximated with a 13-bit to 19-bit word length fixed point computation for typical system jammer-to-noise levels. This property has produced an order-of-magnitude reduction in required hardware complexity. A synthesis-based ASIC design process was used to generate preliminary layouts. These layouts were used to estimate the area and throughput of the VLSI QR decomposition architecture. The results show that this QR decomposition process, when implemented into a full-custom design, provides a computation time that is two orders of magnitude faster than a state-of-the-art microprocessor.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Daniel V. Rabinkin, Daniel V. Rabinkin, William Song, William Song, M. Michael Vai, M. Michael Vai, Huy T. Nguyen, Huy T. Nguyen, "Adaptive array beamforming with fixed-point arithmetic matrix inversion using Givens rotations", Proc. SPIE 4474, Advanced Signal Processing Algorithms, Architectures, and Implementations XI, (20 November 2001); doi: 10.1117/12.448661; https://doi.org/10.1117/12.448661
PROCEEDINGS
12 PAGES


SHARE
RELATED CONTENT

Modified Faddeev Algorithm For Matrix Manipulation
Proceedings of SPIE (November 27 1984)
Fast RNS algorithm for computational geometry problems
Proceedings of SPIE (November 19 2001)
Implementation Of Cellular Arrays
Proceedings of SPIE (July 29 1982)
Systolic Arrays For Eigenvalue Computation
Proceedings of SPIE (January 03 1986)
A Parallel VLSI Direction Finding Algorithm
Proceedings of SPIE (February 22 1988)

Back to Top