24 July 2001 Fault injection emulator for field programmable gate arrays
Author Affiliations +
Proceedings Volume 4525, Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III; (2001) https://doi.org/10.1117/12.434369
Event: ITCom 2001: International Symposium on the Convergence of IT and Communications, 2001, Denver, CO, United States
As the prevalence and size of Field Programmable Gate Arrays (FPGAs) has increased, so too has the complexity of manufacturing testing and defect diagnosis for yield enhancement. The re-programmability of FPGAs has attracted considerable interest in the ability to re-program a system function to avoid any known faults. As a result, various test, diagnostic, and fault tolerant techniques have been developed for FPGAs. However, the evaluation of the effectiveness of these techniques is nearly impossible using traditional fault simulation techniques due to the size and complexity of current FPGAs. We have developed an emulation procedure to inject faults into FPGAs in such a way that the faults are actually emulated in the physical FPGA. By determining proper bit locations within the configuration memory of the FPGA, download files used to program the FPGA can be manipulated to emulate faults including stuck-at faults, bridging faults, and opens in the programmable logic and routing resources of the FPGA. Almost any combination faults can be emulated spatially (allowing for either clustering or random distributions) and/or temporally (allowing for the simulation of burst or random faults over time).
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Thomas Slaughter, Thomas Slaughter, Charles Stroud, Charles Stroud, John Emmert, John Emmert, Brandon Skaggs, Brandon Skaggs, } "Fault injection emulator for field programmable gate arrays", Proc. SPIE 4525, Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, (24 July 2001); doi: 10.1117/12.434369; https://doi.org/10.1117/12.434369


EPL data conversion system
Proceedings of SPIE (May 19 2004)
Designing a partially reconfigured system
Proceedings of SPIE (September 18 1995)
Mask-/reticle-making control system
Proceedings of SPIE (July 02 1995)

Back to Top