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27 July 2001 Software-based MPEG-2 encoding system with scalable and multithreaded architecture
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Proceedings Volume 4528, Commercial Applications for High-Performance Computing; (2001)
Event: ITCom 2001: International Symposium on the Convergence of IT and Communications, 2001, Denver, CO, United States
MPEG-2 video encoders are now available in a variety of forms using both hardware and software based approaches. The software-based approach potentially offers a better picture quality but is computationally quite intensive. MPEG-2 video encoding can be fast processed using parallelism. A number of approaches using parallel machines or networks of workstations have been reported. While these approaches promise good concepts they do not offer commercial solutions due to factors such as cost, size, etc. In this paper, we propose a new approach with the aim to build a cost-effective and a completely practical solution that is not only highly efficient but is also scalable from single-processor to multiple-processor PC. The highlights of the proposed work include an algorithm for enhancing the efficiency of motion estimation, speeding up the computation of motion estimation and DCT with Intel's SIMD (Single Instruction, Multiple Data) style MMX and SSE instruction sets within a single processor, and scheduling and allocation of a multithreading scheme on a multiple processor PC for managing I/O, synchronization, audio and video encoding, and multiplexing. The proposed multithreaded encoder exploits temporal parallelism in MPEG video sequences with small overhead. The encoder, providing a complete compression solution, achieves faster than the real-time and half of real-time encoding rates for CIF (352 x 288) and CCIR601 (720 x 576) video sequences, respectively, on multiple processor PC.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Ishfaq Ahmad, Dick-Kwong Yeung, Weiguo Zheng, and Shehzad Mehmood "Software-based MPEG-2 encoding system with scalable and multithreaded architecture", Proc. SPIE 4528, Commercial Applications for High-Performance Computing, (27 July 2001);

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