Micro Stereo Lithography (MSL) is a poor man's LIGA for fabricating high aspect ratio MEMS devices in UV curable semiconducting polymers using either two computer-controlled low inertia galvanometric mirrors with the aid of focusing lens or an array of optical fibers. This technique has also been successfully used recently for fabricating 3D metallic and ceramic MEMS devices. Microfabrication techniques such as bulk micromachining and surface micromachining currently employed to conceive MEMS are largely derived from the standard IC and microelectronics technology. Even though many MEMS devices with integrated electronics have been achieved by using the traditional micromachining techniques, some limitations have nevertheless to be underlined: 1) these techniques are very expensive and need specific installations as well as a cleanroom environment, 2) the materials that can be used up to now are restricted to silicon and metals, 3) the manufacture of 3D parts having curved surfaces or an important number of layers is not possible. Moreover, for some biological applications, the materials used for sensors must be compatible with human body and the actuators need to have high strain and displacement which the current silicon based MEMS do not provide. It is thus natural for the researchers to look for alternative methods to make 3D sensors and actuators using polymeric based materials. For MSL techniques to be successful as their silicon counterparts, one has to come up with multifunctional polymers. These multifunctional polymers have not only a high sensing capability but also a high strain and actuation performance. With the invention of organic thin film transistor, now it seems possible to fabricate polymeric based MEMS devices with built-in- electronics. Moreover, with combined architecture techniques, one can integrate silicon devices with the polymeric ones without much difficulty. In this paper, the applications of MSL for polymer and ceramic based microstructures and MEMS and applications of these devices in conceiving a compact fuel cell with carbon nanotubes and hydrogen are discussed.

Results are presented from studies to prepare carbon nanotubes of single geometry. Carbon nanotubes of certain stereochemistry have been found to be conductive. Others have been found to be excellent transistors, and together nanoelectronic devices have already been formed from them including logic gate circuits. Two synthetic approaches have been tried, namely plasma arcing in the presence of additives and ball milling. In plasma arcing, cathode deposits are altered by the presence of naphthalene in the feed material. The mixture of nanotubes so formed has a larger average void size than that formed in the absence of naphthalene. The results support proposed mechanisms of nanotube formation which involve growth by incorporation of carbon atoms into open tubes. They also show that naphthalene can be directly incorporated into fullerene black and thereby increase the number of hexagonal sheet structures in the carbon deposit. Work so far in ball milling has been confined to studies of the destruction of graphite crystalline phases.

Silicon nanostructures have been demonstrated by electric- field-enhanced localized oxidation on single crystal silicon wafer using a scanning probe microscope (SPM). In this study, we have demonstrated the use of scanning probe lithography (SPL) and orientation-dependent etching (ODE) can easily obtain nano-wire and nano-gap down to 24nm and 60nm on (110)-oriented silicon substrate. The scanning probe lithography (SPL) provides high resolution, which can be adjusted by tip bias, tip set force, scanning speed, and ambient humidity of environment, without damage in the substrate. The etching process employed the orientation- dependent etching (ODE), because of the etching rate of the (111)-plane is slower than any other crystallographic planes such that anisotropic etching profile can be obtained. The experimental samples were hydrogen-passivated by dipping in 10% aqueous HF solution to remove sample native oxide on the surface before SPM localized oxidation process. The SiO_x nano-patterns on (110)-oriented silicon substrate were generated by SPM localized oxidation. Then, the etching process employed the ODE with a 34 wt.% aqueous KOH solution. The nano-wire feature size is easily down to 24nm and aspect ratio larger than 4:1. The optimization line/space nanostructure is about 20nm/80nm and the nano-gap is about 60nm. In this study, we also have demonstrated the influence of etching temperature on the feature size of nanostructures with same aspect ratio. At the same etching depth (100nm), the line-width decreases with increasing the etching temperature. The theoretic etching rate and experimental etching rate are proportional to temperature, the higher temperature the higher etching rate.

Fluorinated silicon glass (FSG) film prepared by using liquid-phase deposition (LPD) is very potential for use as a smart dielectric owing to its high fluorine concentration (8.6 at %), low dielectric constant (3.46), low stress (43 Mpa), low leakage current density (4.6E-9 A/cm² at 2 MV/cm) and low deposition temperature (room temperature). By affecting the physicochemical properties and the electrical characteristics will be introduced. Furthermore, the LPD FSG has been applied as gate oxide to MOSFET's and polysilicon TFT's. Owing to its novel property of selective deposition, LPD FSG has been also employed to cap the sidewalls for degradation-free damascene trenches, and to fabricate micro contact holes for the N⁺/p diodes and the Schottky diodes.

Compared to conventional mechatronics system design, MEMS design requires new knowledge on materials properties. This is because, materials such as silicon and many other thin films used for MEMS devices have never been used for mechanical purposes in conventional systems. Demands for characterization of materials properties in terms of design and fabrication of MEMS are discussed. Two examples of materials characterization, one for design and the other for fabrication of MEMS, are presented. Firstly, mechanical properties of thin films are evaluated. A new method for uni-axial tensile tet of film material is proposed. The test is performed on a silicon chip where the thin film specimen and the loading mechanism are integrated. Results are presented for such materials as Si, Poly-Si, SiO₂ and Si₃N₄ films sized in a range of 0.1-20 micron thick. Secondary, anisotropic etching properties of single crystal silicon are investigated. Anisotropy in etching rate is completely evaluated as a function of crystallographic orientations. Developed etch-rate database allowed to predict 3D etched profiles of silicon devices which are etched under any mask patterns, any wafer orientations, and a wide range of etching conditions. Examples of 3D structure fabrication using this system are demonstrated.

The general objective of this presentation is to demonstrate the potential of Micro-Opto-Electro-Mechanical (MEOMS) devices based on III-V semiconductor materials, with a special emphasis on applications for Telecommunications. Unlike more classical MOEMS devices, such as shutters, rotating mirrors, etc..., which utilize the concept of geometrical optics, III-V semiconductor MOEMS structures presented here operate via the manipulation of optical interferences. The basic building block consists in a multi-air-gap/suspended membrane structure which can be micromachined using multi-layered III-V semiconductor based heterostructures. This building block is very generic in that it can be designed in a variety of manners allowing for the production of a wide range of optical functions. As a matter of fact the wavelength dependence of the transmittance or of the reflectance depends strongly on the number, the thickness and the successive air- gap/semiconductor pairs, and, given the high index contrast between air and semiconductor, a wide choice of spectral responses can be obtained with very few of them. In addition, a wide choice of electro-opto-mechanical modulations of the spectral responses can be produced by moving vertically, via electrostatic actuation, one or several suspended membranes independently. One single device can be designed in order to achieve one or several functions. Such devices as tunable filters for WDM systems, tunable photodetectors, tunable VCSEL, which are based on this generic building block, will be presented.

Porous silicon fabricated by partial electrochemical dissolution of bulk silicon, shows outstanding material properties. The nanostructure of the remaining Si-skeleton is used for specific optical devices, such as emitters and filters. The high internal surface of the material opens new opportunities for different types of microsensors and -actuators and microsystem concepts. The porous layers can be used as sacrificial layers due to the high reactivity of the material which leads to a new class of micromachined MEMS devices. A brief overview on the historic evolution of the material is given. The base technologies for the fabrication of porous silicon layers are described. An overview on specific applications is given to demonstrate the potential of the material and the technology behind.

In this paper we investigate excimer laser micromachining of TiNi shape memory alloy using an image projection system as an alternative to photolithographic patterning. We report on the characteristics of material removal by KrF excimer laser induced ablation at 248 nm and the dependence of material removal rates on laser parameters such as fluence and pulse frequency. Fluences at the workpiece using a 10x projection lens were up to 2.5 J cm^-2 with pulse repetition rates up to 100Hz. Conventional chrome-on-quartz masks were used for pattern transfer. Material removal mechanisms and rates of material removal are compared with those observed during excimer laser micromachining of polymers and ceramics and limitations on achievable lateral and depth resolution explored. Data obtained by a variety of characterization methods are correlated to assess the effects of laser induced damage.

In this paper, free standing beams and trench structures are successfully fabricated in both n and p-type silicon using macro-porous silicon. Electrochemical etching in hydrofluoric acid has been demonstrated to make 3-D structures in n-type silicon, in a single etch step. A set-up for n-type silicon involves a light source to generate electronic holes in silicon substrate, and the width of the pores can be controlled by the light intensity. However, the use of light makes the set-up more complicated. Using HF, p-type silicon was found only to form random micro-porous structures, and thus not the trenches achieved in n-type silicon. Recently, in order to form a macro pore in p-type silicon, a new etchant has been proposed in which the macro pores. This technique has been used to obtain macro-porous structures in p-type material. This technique has been extended to make free standing structures, as done with n-type material. This work has shown that free standing structures can be fabricated using a single etch step in both n and p-type material. P-type has the advantage that no light source is required and also thermal oxide can be used as a masking layer. However, experiments performed to date have shown that the n-type material process is easier to control and is more flexible, in terms of the structures which can be fabricated. Work is continuing to further improve these processes and this paper will examine the processes for n- and p-type material giving the relative merits.

We discuss investigations into a contactless UV-enhanced wet etching technique for GaN. The technique utilizes the oxidising agent potassium persulfate to consume photogenerated electrons, thus avoiding the need for an electrical contact to an external cathode. The etch rate is strongly dependent on illumination intensity and uniformity and on the pH of the KOH solution, as is the roughness of the etched surface. The implementation of a dual illumination scheme whereby an additional UVC lamp was used to illuminate only the solution and not the wafer, resulted in an increased etch rate and smoother etched surface. Finally, the ohmic nature of contacts deposited on n-type GaN that had been etched in this manner was found to be improved compared to contacts on the unetched surface.

We have developed two types of shape memory alloy (SMA) actuator and estimated the long-term reliability of SMA microcoils. A tube type tip articulator consists of 4 sets of SMA microcoil (wire diameter: 0.125 mm, coil diameter: 0.5 mm) for driving source and super elastic alloy (SEA) microcoils (wire diameter: 0.1 mm, coil diameter: 0.5 mm) for bias springs, support plates and flexible outer tube. The tube type tip articulator was bent approximately 90 degrees in any directions when a 200 mA current was applied. The joint mechanism consists of base plate, universal joint, reflection plate (diameter: 170 mm), SMA microcoil springs (wire diameter: 0.1 mm, coil diameter: 0.9 mm) and bias spring. The joint mechanism showed good response for control values with maximum tilt angle of 3.2 degrees. We also estimated the thermal cycling behavior of SMA microcoil actuators with the resistance monitoring method. SMA microcoil actuators (wire diameter: 0.1 mm, coil diameter: 0.5 mm) were given 3.0% shear stress and heated by current. For 10,000 cycles, the force of SMA microcoil actuators was approximately constant and showed good long-term reliability. Since the results show good characteristics and reliability, SMA microcoil actuators can be used in a wide range of industrial and medical applications.

LIGA is a microfabrication technology that enables the fabrication of ultraprecise deep microstructures, from hundreds to thousands of micrometers thick, with lateral dimensions in the micrometer range, and submicron tolerances in a variety of materials. It is a sequence of process steps combining deep X-ray lithography, plating-through-mask and replication. The first step of deep lithography in thick resist using synchrotron radiation will be emphasized. The replication techniques extend the applicability of LIGA by offering a broad spectrum of materials but also by allowing for low-cost volume application. Key technological areas receiving attention are materials base expansion, multi-level processing, formation of complex shapes, and assembly.

In the current study, a systematic recipe set was developed for processing SU8-5 photoresist in order to fabricate a microaccelerometer with high-aspect-ratio structure by UV-LIGA process. The disclosed recipe set comprises a series of relative recipes for processing SU8-5, including spin speed, soft bake, exposure dose, post exposure bake and developing time. The recipe set is capable of processing SU8-5 film with thickness from 5micrometers to 80micrometers . General hot plate, Karl Suess Gyrset spinner RC8 CT62 (spin coater) and MJB3 exposure aligner which all belongs to the frequently adopted equipments in the traditional IC fab, were used to explore these recipes. To verify these recipes, the SU8-5 micromold fabricated according to the presented recipe set is employed to electroplate the structure of the biaxial microaccelerometer with critical dimension of 4x20x500micrometers . The detail and most effective process parameters described in this systematic recipe set promote the beginner to process SU8-5 and fabricate the SU8-5 micromold. In addition, various failure reasons due to adopting the improper recipes are also discussed to provide the guide line for the reader to develop and approach their own proper recipe to process SU8-5.

As the demand of the micro-optics in the field of optical data storage, optical communication, and digital display has been increased, it has become important to establish fabrication technology for plastic micro-optics, which have advantage mainly in manufacturing cost. Micromolding methods such as micro-injection molding and micro- compression molding are most suitable for mass production of plastic micro-optics with low cost. In the present study, plastic micro-optical components, such as refractive microlenses and diffractive optical elements (DOEs) with various grating patterns, were fabricated using micro- compression molding process. The mold inserts were made by ultra precision mechanical machining, and silicon etching. A micro compression molding system was designed and developed. Polymer films and powders were used as molded materials. Various defects found during molding were analyzed, and the process was optimized experimentally by controlling the governing process parameters such as histories of mold temperature and compression pressure. Micro lenses of hemispherical shape with 153micrometers radius of curvature were fabricated. The blazed and 4 stepped diffractive optical elements with 24micrometers pitch and 5micrometers depth were also fabricated. Optical and geometrical properties of plastic molded parts were measured by interferometric technique.

Low Temperature Cofired Ceramic (LTCC) material can be used as a reliable multilayer substrate material for silicon based MEMS component packaging due to many benefits like hermeticity, good match of thermal expansion coefficient (TCE) to silicon to minimise packaging-induced thermomechanical stresses, and the possibility to make cavities into the structure. The applicability of LTCC technologies for MEMS packaging is described in this paper. A review of the technologies used in making LTCC modules, such as substrate manufacturing, interconnecting, sealing and protection, and the benefits of LTCC for MEMS packaging is presented. Also examples on the use of LTCC technology for MEMS sensor packaging are discussed.

Micromachining processes have been extensively adapted in developing uncooled infrared imaging array. One of the most important sensing materials in the array is ferroelectric thin film. To integrate the ferroelectric thin film with the signal processing circuitry, an IC compatible process has to be applied. Various methods have been successfully used to prepare high quality oxide ferroelectric thin films. Unfortunately, not all of the methods are compatible with a standard CMOS process. None of them can optimize the ferroelectric thin film after it has been deposited onto IC chip due to high heat treatment temperature. A Flip-Chip Transfer (FCT) method is proposed here to optimize the ferroelectric thin film separately with the IC chip. Doing so, any necessary measure could be taken to optimize the performance of the ferroelectric thin film. After that, anisotropic conductive film (ACF) is applied between the ferroelectric thin film and the IC chip to establish interconnection and mechanical bonding between the sensing element and the signal processing circuit. Micromachining process is then applied to remove the substrate, usually Si, on which the sensing material is deposited. A 128x1 linear pyroelectric infrared imaging array is being fabricated.

A pulsed excimer laser (248 nm) based LIGA-like process is presented for the fabrication of Ni serpentine microstructures, such as those that might be used for micro-heaters. The structures were produced on both Cu (60 micrometers ) clad PCB and on Cu/Ti (up to 4 micrometers /15 nm) sputtered Si (100) substrates. The substrates were coated with a Laminar dry film (35 micrometers ) photoresist, which was then patterned by laser ablation to produce the mould for Ni electroforming. The optimal ablation conditions were identified for laser patterning to prepare the micro polymer mould. Beam fluence (~ 1 J/cm²) and number of shots (~ 60 pulses) for 50 micrometers wide features on this photoresist were established, and it was observed that an increased number of shots and increased fluence were needed for features less than 20 micrometers wide. Additionally, the Cu layer surface was cleaned by the use of 5 -10 laser pulses at the same fluence. Ni electroforming has been carried out using standard Ni sulfamate bath at a current density of ~ 10 mA/cm². After Ni electroforming, both the Laminar dry film and the Cu layers around the electroformed Ni patterns were removed using a combination of acetone, laser and Cu selective etching. Finally, a series of Ni microstructures were fabricated consisting of up to 50 micrometers wide and 35 micrometers thick serpentine tracks. The devices were measured using a scanning confocal microscope and it was found that using the excimer laser to remove the remaining dry film laminate also smoothed the electroplated Ni surfaces from a pre-laser treated Ra of 1.20 micrometers to 0.19 micrometers . Laser ablation also released the finer features from the substrate.

Two mechanical gripper types have been designed. Using a technology selection method, EDM was selected as the most appropriate fabrication technology for the designed grippers. Prototypes have been fabricated by wire EDM on a conventional machine. Increased attention has been paid to methodology of the production process and exploration of (mu) -EDM possibilities. The tolerance obtained is about 1 micrometers . The accuracy of the machined product is mainly determined by the quality of the electrode, its handling and the adjustment procedures. After fabrication the grippers were integrated onto a station for handling and assembly of microstructures. This paper provides a description of the used methodology in the production sequence and information on the machining process of the whole gripping system (gripper, holder, arrow). The results after the production are tested, analyzed and discussed.

Third generation (3G) cellular wireless systems are envisioned to offer low cost, high-capacity mobile communications with data rates of up to 2 Mbit/s, with global roaming and advanced data services. Besides adding mobility to the internet, 3G systems will provide location-based services, as well as personalized information and entertainment. Low cost, high dynamic-range radios, both for base stations (BS) and for mobile stations (MS) are required to enable worldwide deployment of such networks. A receiver's reference sensitivity, intermodulation characteristics, and blocking characteristics, set by a wireless standard, define performance requirements of individual components of a receiver front end. Since base station handles multiple signals from various distances simultaneously, its radio specifications are significantly more demanding than those for mobile devices. While high level of integration has already been achieved for second generation hand-sets using low-cost silicon technologies, the cost and size reduction of base stations still remains a challenge and necessity. While silicon RFIC technology is steadily improving, it is still difficult to achieve noise figure (NF), linearity, and phase noise requirements with presently available devices. This paper will discuss base station specification for 2G (GSM) and 3G (UMTS) systems, as well as the feasibility of implementing base station radios in low-cost silicon processes.

One problem faced by designers utilizing polysilicon based surface micromaching processes is the poor conductivity of polysilicon. Process factors preclude inclusion of metal layers in these processes before the final polysilicon layer is annealed. Adding metal after anneal but before release restricts the metal to only the top layer of the design, making it much less useful for interconnect, and restricting reflective surfaces to the top layer. We present techniques for adding metal after release which avoid some of the usual pitfalls. Application areas for which these techniques could prove useful include RF, Microwave, Optical MEMS, and MEMS devices used in high-speed digital communications. Creating a multilayer metal interconnect is enabled by utilizing a self-masking approach to avoid shorting, and applying e-beam evaporation from a variety of angles. Using this approach, even lower level polysilicon lines can be metallized. Results using two deposition angle recipes on test structures and devices fabricated in a thin film MEMS process are presented.

Electromagnetic actuation is applied to MOEMS for industrial applications requiring large and long-range forces. Advantages and drawbacks are outlined while down scaling laws are discussed. Technological improvements and new available materials bring to much smaller dimensions, the limit between Electromagnetism and Electrostatics. Remote control and bi-stability are unique characteristics of electromagnetic actuation. The importance of remote control is stressed so as to allow easy tests and optimization with no technological compatibility problem. These advantages are illustrated on three different electromagnetic MOEMS, developed in LIMMS, a Franco-Japanese research Laboratory based in Tokyo. The first is a resonant 1D magnetic scanner, the second is a magnetic bi-stable matrix array of optical micro-switches and the last is a remarkable application of the properties of thick Magnetostrictive thin layers to a 2D scanner.

Current state-of-the-art commercial star sensors typically weigh 15 pounds, attain 5 to 10 arc-second accuracy, and use roughly 10 watts of power. Unfortunately, the current state-of-the-art commercial star sensors do not meet many of NASA's next-generation spacecraft and instrument needs. Nor do they satisfy Air Force's needs for micro/nano-satellite systems. In an effort to satisfy micro/nano satellite mission needs the Air Force Research Laboratory is developing an intelligent star Tracker, called IntelliStar, which incorporates several novel technologies including Silicon carbide optical housing, MEMs based adaptive optic technologies, smart active pixels, and algebraic coding theory. The design considerations associated with the development of the IntelliStar system are presented along with experimental results which characterize each technologies contribution to overall system performance. In addition to being light weight, the IntelliStar System offers advantages in speed, size, power consumption, and radiation tolerance.

In this paper we present a novel displacement sensing system where the sensing direction is in the plane of the planar sensor coils. Particular emphasis in this work is given to the design and micro fabrication of the sensor coils. It has been found that the position of the sensor coils is extremely important as the location of the sensor coils relative to the target significantly affects the sensitivity of the resultant sensing system. Extensive experiments have been carried out and show that best sensitivity is achieved when the sensor coil is located so that the overlap area between the rotor and the sensor coil turns changes most rapidly with the rotor displacement. Following the preliminary analysis and experiments, new optimized sensor coils have been designed and micro fabricated using UV lithography and electroplating, as detailed in the paper. Performance testing of the resultant sensing system has been carried out and is reported in the paper.

The sensor community has long been presented with the problem of prioritizing among several competing sensor system variables due to the inability to produce a high confidence, low-cost, reliable, and compact device. Typically a solution for very critical scenarios has been a high-cost scale reduction of larger more laboratory based instrumentation. This often produces data on a single parameter that is beyond reproach, however this can also produce a very delicate, bulky, and costly system often requiring a vacuum system of some sort. An alternative approach involves using micro-opto-electro-mechanical systems (MOEMS) based sensors. This typically results in low-cost and extremely compact devices that often produce dubious or insufficient data. Our approach integrates multiple orthogonal stimuli within a single chip to produce a MOEMS based sensor that has a very high degree of signal confidence. The combination of multiple independent parameters significantly improves detection reliability in a small low-cost package. However, it is often the case that the most efficient MOEMS sensing methods require the use of material properties other than the conventional microlithograph based Si, SiN_x, SiO₂ and metals. Thus we have been developing techniques to employ more exotic semiconductors for various sensing applications. The group III-V and II-VI compound semiconductors form a very important and versatile collection of material property variables (thermal, optical, mechanical, electrical) available to the MOEMS designer.

Wafer process packaging using electrical feedthrough from glass holes has been applied for micromechanical sensors as electrostatically levitating micro motors (10,000 rpm) for rotational gyroscopes. Active catheters and sensors have been developed as maintenance tools used in narrow space. Silicon microstructures made by the deep RIE was used as molds for making ceramic microstructures. Hydrogen storage capacity of carbon nanotube was measured from the resonant frequency change of thin silicon cantilever which have the carbon nanotube on it. Multiprobe data storage devices have been fabricated using thermal probes of which tip size is 30 nm. The electrical feedthrough from the multiprobe was fabricated in a Pyrex glass plate by using Deep RIE (Reactive Ion Etching) and nickel electroplating. High density data recording to a phase change media (GeSbTe) was performed.

A microsystem for the measurement of profiles of high aspect-ratio microstructures has been developed. This microsystem uses a silicon micro-probe with a sharp tip at its end and an integrated piezoresistive strain gauge force sensor. The probes are from 500 micrometers to 1 mm long with a cross-section of 20x20micrometers ²; they were previously mainly designed for the characterization of narrow and deep micro-holes having a radius as small as 50micrometers . The profile measurement method has been extended to the characterization of other microstructures. In a first part of this paper, we explain the method based on an original algorithm to measure profiles with the greatest precision and reproducibility. In a second part we give some information about the capabilities for horizontal and vertical profiles measurement, concave and convex surfaces profiles plotting. We conclude with some experimental results for several types of profiles.

Stiction is a major failure mechanism during the operation of accelerometers and hence it is important to know the stiction force that the structures encounter during use. We explore the possibility of devising an electrical technique for the direct measurement of in use stiction force. We have designed and fabricated three terminal test structures to measure both vertical and horizontal in use stiction. The measurement is not visual and is based on I-V data with the possibility of automation in the future. The structure consists of cantilever beams of different lengths each with an actuating pad and a detection pad. We measure the pull in voltage applied to the actuating pad, V_PI , required to bring the cantilever beam in contact with the detection pad and the pull out voltage, V_PO, at which the contact is broken. Using the Finite Element tool, ANSYS, a coupled electromechanical model is developed to determine the stiction force from the pull-in and pull-out voltages. We discuss the measurements in terms of the advantages and the shortcomings. We also discuss the sensitivity of the model to various material and geometric parameters and to the accuracy of the measurement.

Modern communications demands have been steadily growing not only in size, but sophistication. Phone calls over copper wires have evolved into high definition video conferencing over optical fibers, and wireless internet browsing. The technology used to meet these demands is under constant pressure to provide increased capacity, speed, and efficiency, all with reduced size and cost. Various MEMS technologies have shown great promise for meeting these challenges by extending the performance of conventional circuitry and introducing radical new systems approaches. A variety of strategic MEMS structures including various cost-effective free-space optics and high-Q RF components are described, along with related practical implementation issues. These components are rapidly becoming essential for enabling the development of progressive new communications systems technologies including all-optical networks, and low cost multi-system wireless terminals and basestations.

Ferroelectric thin films like lead zirconate titanate (PZT) are used to form several different families of MEMS devices. Moving mirrors for optical switching applications utilize the piezoelectric properties of PZT; varactors depend on its dielectric nonlinearity. The oxidizing environment during PZT deposition means that some material capable of resisting oxidation, like platinum, must be used as the metal electrode in any metal-ferroelectric-metal (MFM) stack. Ion milling has been used in laboratory applications for patterning MFM stacks. However, ion milling removal rates are low (~400 Angstroms/min), the throughputs are low, and the etched materials tend to redeposit along the edge of the etch mask, creating veils, or fences, after the etch mask is removed. These residues can lead to yield-limiting defects in finished devices. We report here on MFM stack etch results from a capacitively coupled high density plasma etch reactor. Using photoresist masks, we have demonstrated platinum and PZT etch rates greater than 1000 Angstroms/min at moderate (80 degree(s)C) wafer temperatures. Good etch profiles with no post-etch residue are produced for MFM stacks like those used for a MEMS-based Atomic Force Microscopy application, for example, which employs a bottom platinum layer 1500 Angstroms thick, 2800 Angstroms of PZT, and a platinum top electrode of 1500 Angstroms.

The rapid growth of Internet data communication, facilitated by the advent of wavelength-division-multiplexing technologies, has influenced ways of communications worldwide substantially, and demanded for innovations in network architectures and technologies. MEMS has recently emerged as a promising and heavily-suit-after technology for implementing various network elements and components in optical networks, such as optical cross-connects (OXCs), wavelength add/drop, tunable laser and filter, modulator, variable attenuator, gain equalizer, polarization controller, and dispersion compensator. We discuss current status, challenges lying in front, and future prospect of this technology.

Si micromachining is a promising technique for fabricating several optical components. It is also indispensable for the low-cost assembly. We studied the Si micromachining for fabricating optical sensors and components. The Si crystalline etching was studied for generating the mirror surface smooth enough to be used in micro-laser-cavity. The etched Si mirror surface was transferred to the polymer replica by molding. Laser oscillation was demonstrated with the replicated solid-dye-micro-laser. The optical transmission structures were also fabricated by etching through Si wafer with the deep RIE, and used for new optical components. The integrated pinhole filter, position sensor and optical encoder were proposed. Integration of optical components with micro-actuator makes the optical system variable. The three-dimensional structures with actuators were fabricated by the new lithographic technique using spray resist coater. A tunable filter for telecommunication and a laser beam scanner with micro-mirror were fabricated.

Most of the MOEMS including optical switches and micro optical benches are developed on silicon. As for the MEMS, the main reason is that silicon has consistently been the material of choice for the microelectronics industry, due to a mature processing technology which offers the possibility to integrate MEMS devices with Integrated Circuits in a low cost batch fabrication process. However, since the beginning of Optoelectronic, silicon has been suffering from its poor efficiency to emit light because of its indirect band gap. Optical active devices can be integrated on silicon by combining specific active materials in order to keep the main advantage of silicon micromachining for MOEMS applications. This paper illustrates this purpose through one project developed in the frame of the LIMMS, joint laboratory between France and Japan. This project deals with optical active devices for which silicon micromachining technology has been employed to fabricate an organic semiconductors based light emitted diode on silicon substrate.

An ARROW-B (antiresonant reflecting optical waveguide, type B) surface plasmon resonance (SPR) sensor operating in aqueous environment is proposed. The characteristics, design, and optimization of the Au-coated ARROW-B SPR sensor are discussed. The operating range of the sensor can be shifted by adding a dielectric overlay. The detectable changes of the refractive index down to the order of 10^-5 can be achieved. The design of an ARROW SPR sensor on Si substrates for detecting hydrogen molecules with palladium as the metal film will also be discussed.

Micromirrors with linear deflection behaviors have been found useful for systems requiring 1D and 2D optical scanning patterns and are solutions for low-cost vector or video raster image generators. The advantages of thermal buckle-beam and bimorph actuators are high resulting force, low MEMS area and low voltage requirements. The devices presented in this paper can achieve modest deflection angles at relatively high frequencies. The mirror actuators consists of a doubly clamped array of polysilicon beams that are Joule heated and allowed to buckle out-of-plane. Instead of utilizing the usual linear displacement, a torque is derived from a coupling beam attached across the buckling beams at the point of the maximum derivative of buckle. As the beams buckle, the torque causes the mirror to be rotated away from the substrate. Non-resonant, near-linear mirror deflection response has been achieved with a maximum deflection of six mechanical degrees at a frequency of a few KHz. Employing a high Q resonant structure, a frequency of 16 KHz has been attained with a 1D mirror scanner at a maximum mechanical deflection of around 20 degrees. 1D and 2D scanning mirror devices have been built and will be reviewed in this paper.

High aspect ratio beam/trench arrays are etched into silicon substrates using a Surface Technology Systems (STS) deep reactive ion etch (RIE) tool. Process input parameters are varied using high/low values for etch cycle time, passivation cycle time, RF power, and SF₆ flow rate. The silicon etch process is characterized using photo-resist masked trench arrays varied from 1.5micrometers through 6micrometers in both width and spacing. A design of experiments (DOE) approach is used to model the following measured outputs: 1) trench depth (R²=0.985), 2) lateral trench etch (R²=0.852), 3) trench sidewall angle (R²=0.815), and 4) aspect ratio dependent etch (R²=0.942), where R² represents the correlation between actual and model predicted values. The presented characterization models are employed to form beams as small as 300nm wide beams etched to a depth >15micrometers with near vertical sidewalls using standard photolithography equipment. In addition, the provided models are exploited to produce a dual re-entrant/tapered beam etch release process. Released silicon beams are demonstrated over 1200micrometers long and 30micrometers thick with a base width of 300nm.

MEMs are basically sensors and actuators in a harsh environment or strains exceeding 10² and strain rates approaching shock deformation conditions. The reliability concerns are electronic, optical and micro-mechanical. Surface morphology of sensors and actuators becomes critical and the investigation presents results on diamond like films developed for resolving tribology related problems in MEMs rotating surfaces. Other MEMs results on surface passivation are reviewed.

The need for technical innovation is always present in today's economy. Microfabrication methods have evolved in support of the demand for smaller and faster integrated circuits with price performance improvements always in the scope of the manufacturing design engineer. The dispersion of processing technology spans well beyond IC fabrication today with batch fabrication and wafer scale processing lending advantages to MEMES applications from biotechnology to consumer electronics from oil exploration to aerospace. Today the demand for innovative processing techniques that enable technology is apparent where only a few years ago appeared too costly or not reliable. In high volume applications where yield and cost improvements are measured in fractions of a percent it is imperative to have process technologies that produce consistent results. Only a few years ago thick resist coatings were limited to thickness less than 20 microns. Factors such as uniformity, edge bead and multiple coatings made high volume production impossible. New developments in photoresist formulation combined with advanced coating equipment techniques that closely controls process parameters have enable thick photoresist coatings of 70 microns with acceptable uniformity and edge bead in one pass. Packaging of microelectronic and micromechanical devices is often a significant cost factor and a reliability issue for high volume low cost production. Technologies such as flip- chip assembly provide a solution for cost and reliability improvements over wire bond techniques. The processing for such technology demands dimensional control and presents a significant cost savings if it were compatible with mainstream technologies. Thick photoresist layers, with good sidewall control would allow wafer-bumping technologies to penetrate the barriers to yield and production where costs for technology are the overriding issue. Single pass processing is paramount to the manufacturability of packaging technology. Uniformity and edge bead control defined the success of process implementation. Today advanced packaging solutions are created with thick photoresist coatings. The techniques and results will be presented.

In this paper, the technique for fabricating integrated polymer magnet suitable for microelectromechanical system (MEMS) is discussed. Spin coating and screen printing techniques have been reported by other researchers, however, obtaining small feature sizes and good alignment accuracy are difficult. Furthermore, from our experiments, spin coating of composite material results in unacceptable surface roughness and it is difficult to obtain high powder loading. The paper discusses the technique of implementing template printing where the sacricial layer is used to form the template for polymer magnet structure. Instead of dispersing magnetic powder into the matrix material, magnetic powder is filled into template follow by embedding of matrix material. This technique has the advantages of improved alignment accuracy, minimum structure size achievable, and high magnetic powder loading. Strontium ferrite/polyimide composite structure has been fabricated. Integrated polymer magnet as small as 100 micrometers in diameter has been achieved. Alignment is only limited by alignment of the template using mask aligner used by typical photolithography step. Volume loading of 65%, Residual magnetic flux density Br of 0:21 T, Intrinsic coercivity H_ci of 325 kA/m, and maximum energy product (BH)_max of 8145 T A/m were achieved.

A new promising material for MEMS elements - anodic aluminium oxide is described. There were developed few methods of anodic aluminium oxide MEMS elements production on the base of microelectronic technology. Described methods of 3D MEMS elements obtaining can essentially supplement and in some cases substitute existing LIGA-like technologies owing to their cheapness and simplicity. It is necessary to point out that the realization of MEMS elements by described methods requires no complex and expensive equipment.

This paper describes work on two-way shape memory (TWSM) training of 52at.% Ti--48at.% Ni thin films. The amount of recoverable strain of shape memory alloys (SMA) with TWSM is about 2%. With TWSM, NiTi films will remember different high-temperature and low-temperature shapes. These shapes may be cycled fairly reproducibly by simply changing the temperature. In this work, NiTi films were deposited by RF magnetron sputtering from an NiTi target with atomic composition of 56at.% Ti--44at.% Ni. The atomic composition of the sputtered films was determined to be 52at.% Ti--48.0at.% Ni by electron microprobe. Solution treatment of the as-deposited films was required to crystallize and memorize a high-temperature shape, followed by age treatment to increase the transformation temperatures to above room temperature. The crystal structure of the solution-treated films was determined to be B2. The transformation temperatures of the age-treated films were determined by differential scanning calorimeter to be 311 K (A*) and 307 K (R*). TWSM training was carried out by over deforming the specimen while in the R-phase. Below R_f, a load was applied to the specimen beyond the usual strain limit for completely recoverable shape memory. Then, the load was removed prior to the next heating step, upon which the reverse transformation occurred under zero stress. With similar loads and temperatures, the procedure was then repeated. This paper will present details of the fabrication techniques, measurement results and its application.

This paper presents the processing compatibility of ZnO piezoelectric film with MEMS devices. ZnO film has widely been used as an important element in the field of MEMS due to its good piezoelectric performance. The present investigations mainly focus on fabricating the ZnO film with good performance by optimizing the fabrication process. However, through our experiments, we found that further micromachining processes can badly modify the performance of ZnO film if they haven't been considered properly. Thus, different from other studies, this paper discusses techniques to keep the good piezoelectric performance of ZnO film in further processes after the ZnO film has been formed. These further processes for the device with ZnO film mostly include photolithography, wet and dry etching, stripping, cleaning, and depositing. The paper will present how these further processes change the performance of ZnO film and how to decrease or avoid the change of the performance, especially when the high temperature processes is needed. Some suggestion about process was given.

A 3D Feed horn shape MEMS antenna has some attractive features for array application, which can be used to improve microbolometer performance. Since MEMS technology have been faced many difficulties to fabrication of 3D feed horn shape MEMS antenna array itself. The purpose of this paper is to propose a new fabrication method to realize a 3D feed horn shape MEMS antenna array using a MRPBI(Mirror Reflected Parallel Beam Illuminator) system with an ultra-slow-rotated and inclined x-y-z stage. A high-aspect-ratio 300 micrometers sidewalls had been fabricated using SU-8 negative photo resist. It can be demonstrated to feasibility of realize 3D feed horn shape MEMS antenna array fabrication. In order to study the effect of this novel technique, the 3D feed horn shape MEMS antenna array had been simulated with HFSS(High Frequency Structure Simulator) tools and then compared with traditional 3D theoretical antenna models. As a result, it seems possible to use a 3D feed horn shape MEMS antenna at the tera hertz band to improve microbolometer performance and optical MEMS device fabrication.

In the paper, we improved the performance of the microbolometer using coupled feed horn antenna. The response time of the device was improved by reducing thermal time constant as the area of the absorption layer was reduced. We designed the shape of an absorption layer as circular structure in order to reduce the coupling loss between the antenna and the bolometer. A supporting leg for thermal isolation also has circular structure and its length increased up to 82micrometers , it reduced the thermal conductance to 4.65x 10^-8[W/K]. The directivity of the designed antenna has 20.8dB. So the detectivity of the bolometer was improved to 2.37x 10^-9 [cm ROOT(Hz)/W] as the noise characteristics of the bolometer was enhanced by coupling feed horn antenna. The fabrication of the bolometer are carried out by a surface micromachining method that uses a polyimide as a sacrificial layer. The absorption layer material of the bolometer is VO_x and its TCR value has above 2%/K. The 3-D feed horn antenna structure can be constructed by using a PMER negative photoresist. The antenna and the bolometer can be bonded by Au-Au flip chip bonding method.

This paper designs a process to prepare RF-MEMS using porous silicon (PS) as a sacrificial layer. The details of the process are discussed, such as the influences of H₂SO₄, H₃PO₄, and HF on the PS layer. KOH and TMAH solutions are used to remove the PS layer through small etching holes and to reduce the probability of the potential film damage, ethanol is used to dilute the KOH and TMAH solution. After the process, a suspended thin SiO₂ film as large as 2x2mm² is successfully achieved and the maximum lateral distance between the small etching holes is 540micrometers . Finally, two application examples are given.

Using silicon technology, our approach to tunable VCSEL uses a micromachined suspended deformable membrane that also function as the top mirror above the semiconductor cavity by an airgap. Here, we report the design of a microelectromechanical tunable VCSELs whose frequency is centered around 1300nm. Our Mi-T-VCSELs include: - A Quantum Dots (QDs) active region of InAs ((lambda) =1300nm), - An electrically tunable vertical resonant Fabry-Perot cavity, which is formed by an air-gap and a movable membrane suspended over the active component. Our QDs Mi-T VCSEL is based on semiconductor-coupled cavity (SCC) design, where the QDs are located inside a semiconductor cavity with thickness a multiple of (lambda) /2, and an air gap, with thickness an odd multiple of N (lambda) /4, is a part of top mirror. Optical behavior of the Mi-T VCSEL is analyzed by a transfer matrix approach that includes the individual properties of the various layers. We carried out mechanical simulations of the top mirrors structures, in order to design and determine all lateral and vertical dimensions. Tuning was achieved for an applied voltage between 0-30V across the air-gap. The usable range of deflection is ~500nm.

Lobster-eye optics are an exciting advance in the field of x-ray astronomy, specifically as focusing optics for wide field of view telescopes. In its simplest form the optic is a square packed array of square-channels. Typical channel dimensions are width 10 - 30 mm, length 300 - 1000 mm, and wall thickness of ~2 - 5 mm. These dimensions raise the question of whether such devices can be made in the deep x-ray LIGA regime. Following recent success in fabricating a low aspect ratio Lobster-eye structure, we discuss some of the parameters for, and production issues involved in making, a useful high aspect ratio Lobster-eye prototype. We report on our initial attempts to produce high aspect ratio Lobster-eye optics using the LIGA process with a Graphite substrate.

With increasing data traffics, the importance of the switches is increasing and further cost reduction will be expected. One of the most effective efforts to decrease the cost is introduction of forming technology for micro parts fabrication. The materials of interest are polymer materials for their low cost. In this study, the prototype is presented of the optical switch based on microforming process of polymer materials, and basic characteristics of micro hot embossing are presented. In the present switch, the pop up type micro mirror array on the moving diaphragm fabricated by microforming is actuated by electrostatic force and the optimum electrodes structure of the switch is analyzed by computer simulation to fulfill the large deformation and stable switching. Total system fabrication process including optical fiber alignment and device packaging is also presented. Finally hot embossing of polymer materials are characterized experimentally.

Copper micro-coil arrays have been designed and realized by electroplating for the actuation of arrays of optical matrix micro-switches. The good operation of the micro-switches needs large force that is well fulfilled by the electromagnetic actuation of copper micro-coils. The electromagnetic behavior of the actuator has been examined using the simulator FLUX2D^TM and an optimized configuration of ferromagnetic materials was determined. Arrays of micro-coils with high aspect ratio have been achieved with the use of SU8 resin mould. The diameters of micro-coils range from 0.5 millimeters to 4 millimeters with thickness of about 30 micrometers and few tens of turns. Electric measurements have been done in order to characterize the micro-coils.

A 1500 micrometers X 1200 micrometers silicon scanning mirror for laser display has been fabricated. This scanning mirror is mainly composed of two structures having vertical comb fingers. By anodic bonding of the silicon wafer and the Pyrex glass substrate, and followed deep ICPRIE (Inductively Coupled Plasma Reactive Ion Etching), isolated comb electrodes were fabricated at the lower structure. But in this anodic bonding, gold signal lines for electrical connection to the electrodes, which were inserted between silicon and Pyrex glass, were cut off by mechanical pressure or damaged to agglomerate by diffusion. To remove these phenomena, Pyrex glass was trenched about 2000 Angstroms in depth in the shape of signal lines, and Cr/Au signal lines were formed along the etched grooves about 500 Angstroms/3500 Angstroms in depth, and then annealed at 400 degree(s)C, N₂ atmosphere, for 1 hour before anodic bonding. As a result, gold signal lines were successfully fabricated and the contact resistance was acquired below several tens ohms. By flip chip bonding, the upper and lower structure having vertical comb fingers were assembled. Vertical comb fingers of two structures were aligned with a microscope and the frames of two structures were bonded at 300 degree(s)C for 20 sec. using the eutectic bonding material, electroplated AuSn. Using these bonding technologies, the scanning mirror was successfully fabricated and it could be used for laser display as a galvanometric vertical scanner.

This work aims to design a novel monolithic accelerometer on (111) substrate. A new micro fabrication process is proposed to integrate the electrode and spring-mass system on single wafer without bonding process. This accelerometer has spring with high aspect ratio and large lump mass, which can produce pure in-plane motion. In order to get large capacitance variation, a new design of differential electrode was also proposed. This comb-shape electrode also plays as mask for metal deposition. Furthermore, this process needs only two masks to define spring-mass system and electrode from front side and backside respectively. Anisotropic etching is then used to separate mass from electrode. This step forms a surrounding gap to the opening of the top layer, which insulates top and bottom electrodes automatically.

A single crystal silicon MEMS microactuator for high density hard disk drives is described in this paper. The microactuator is located between a slider and a suspension, and drives the slider on which a magnetic head is attached. The MEMS actuator is fabricated by improved LISA process. It has an electrically isolated 20:1 (40micrometers thick, 2micrometers width) high aspect ratio structure directly processed from a single crystal silicon substrate. The overall dimension of the micro-actuator is 1.4mm by 1.4mm and by a thickness of 0.15mm. Experiments show that +/- 0.6 micrometers displacement stroke of the Read/Write magnetic head, which is attached on the MEMS actuator, can be achieved when input voltage is 40V. The dynamic performances of the MEMS actuator integrated with a Head Gimbal Assembly (HGA) are analyzed by FEM Simulation. The simulation results demonstrated that the controllable in-plane resonance frequency of the MEMS actuator is 1.5 kHz, and the first uncontrollable out-of- plane resonance frequency of the MEMS actuator integrated with the HGA is 16.6kHz. The single crystal silicon microactuator has good shock reliability, and eliminates large material creep and thermal mismatch problems.

The ever-increasing drive to fabricate Integrated Circuits (IC's) with smaller feature sizes is stretching the capabilities of today's optical lithography methods. Current techniques are becoming less scalable, with incremental improvements in resolution requiring ever increasing research and investment. New technologies are appearing, enabling conventional, optical micro-fabrication techniques to be replaced with simpler, scalable methods, revolutionizing IC fabrication. An alternative approach to sub-50nm lithography is presented utilizing the features of smart materials and Micro-Electro-Mechanical Systems (MEMS) technology. MEMS fabricated arrays of electron beam emitters offer the resolution and scalability of Multi-column Electron Beam Lithography (MEBL), while overcoming traditional limitations in production rate, optical complexity and beam current. Critical tradeoffs between significant variables are developed that show the feasibility of the proposed reference design. The proposed method consists of a highly parallel, multi-column EBL system with a production rate from 10-60 wafers/hr at 50nm resolution, and is shown to be feasible with near-term evolution in specific technologies. This solution exploits converging technologies in smart materials, MEMS and precision motion control, to overcome the limitations faced by current EBL approaches.

Due to the inherently non-uniform etching effects in the standard DRIE (Deep Reactive Ion Etch) process, a new technique has been developed specifically for SOI (silicon on insulator) etching. The new system embodies a separate LF power supply that is pulsed when being applied to the platen during the etch cycle. This lends itself to assisting in the reduction of ionic charging at the insulator layer in deep trenches. Consequently, notching or footing of Si structures is disallowed. From this a decrease in over etch sensitivity emerges, with the end result being the ability to produce high-quality, large aspect ratio structures. Si etch rates in the same DRIE process may differ due to three basic effects: Aspect ratio dependent etch (ARDE), microloading (RIE-lag), and the general loading effect by which edges of the substrate etch faster than the center. When etching to a buried insulating layer these effects tend to indirectly encourage footing. The purpose of the research involved was to find optimal process parameters that would minimize footing. Factorial design of experiment technique was used to accomplish this in a two step process. First, main and second order effects on etch-rate uniformity were studied. Then, once supplied with process parameters that minimize uniformity effects, parameter settings that minimize footing were found. The end result is a purse of optimized DRIE-SOI recipes that produce superb high-aspect ratio Silicon structures.

In our previous works, metal injection technique into small diameter (10 -100micrometers ) through holes was developed and applied for fabrication of Si based print circuit board. In the present work, we present the metal filling technology by vacuum casting into 3 dimensional through holes and trenches structure fabricated in stacked layered Si wafers prepared by fusion bonding of ICP etched Si wafers. Metal electrical feed through was successfully prepared by the method. Conventional print circuit boards have been fabricated with Epoxy resin based materials. In recent years Si is regarded as a candidate for next generation materials for print circuit board substrates, as the substrate whose thermal elongation same as the mounted chips is an ideal solution to residual stress problems in the elevated temperature application. In this report, we developed the double sided mountable stacked circuit board using Si deep etching technology and fusion bonding. This technology is expected to lead to the realization of the assembling of sensors, actuators and ICs, i.e. 3 dimensional MEMS packaging. In this report, we adopted micromachining technology to this application area and the special emphasis is placed on the low cost and reliable process development. The detailed items to be developed are shown as follows; 1) Development of Si wafer through holes penetration and trench formation by ICP etching. 2) Alignment and bonding of micromachined wafers. 3) Development of insulating layer with oxidation. 4) Development of formation of electrical feed through for stacked layers.