In this paper an implementation of a watershed algorithm on dynamically reconfigurable architecture is proposed. The hardware architecture dedicated to this algorithm consists of implementing the following transforms: labeled maker image processing, numerical rebuilding, geodesic distance function, and markers propagation. We show that the fast reprogrammability of the FPGA allows the sequential execution of these different stages, which compute watershed segmentation on a low cost hardware architecture.
Mohamed Akil, Mohamed Akil,
"Case study of a dynamically reconfigurable architecture implementing a watershed segmentation", Proc. SPIE 4666, Real-Time Imaging VI, (27 February 2002); doi: 10.1117/12.458523; https://doi.org/10.1117/12.458523