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The reduced CD (critical dimension) of devices places more stringent requirements on the photo process for metal layers, especially for the metal local-interconnect (MLIC) or M0 layer, which can have a minimum dimension similar to poly-gate. This layer has shown a highly localized substrate contamination defect with chemically-amplified (CA) DUV photoresists, which is related to the underlying contact plug. The failure analysis shows that reducing this defect plays an import role in enhancing the yield of a SRAM used as a test vehicle in process development. After transistors are formed, contacts to gates and source/drain regions are opened and subsequently filled with W-plugs, then a PVD TiN film is deposited as a MLIC layer between transistors. A silicon oxynitride (SiON) film is deposited as an anti-reflection layer, and a SiO2 cap is utilized as a substrate contamination barrier. However, with such a film structure, after resist patterning etch and cleaning, one major defect was often observed at the final inspection stage. This defect was always spatially-correlated to an underlying contact plug, and resulted in highly localized 'swelling' or bridging of adjacent photoresist features. In this paper, the MLIC swelling defect is characterized and its possible root causes are discussed. The correlation between the defect and the type of resist (high activation energy and low activation energy) is investigated as well. In order to eliminate the defect thoroughly or to reduce the number of defects substantially, many experimental tests have been carried out, which include the defectivity comparisons with different resists, the application of an organic bottom anti-reflection coating (BARC), the outgas reduction for poly-metal dielectric (PMD) layers, the optimization of resist striping procedure for implant layer before metal deposition, the double CA resist coating and so on. The results indicate that it is possible to eliminate the swelling defect at the photo stage by applying several special treatments.
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