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16 July 2002 Improving sub-150-nm lithography and etch CD-SEM correlations to AFM and electrical test
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Abstract
Automated top down critical dimension scanning electron microscopy (CD SEM) remains the tool of choice for critical dimension process control and dispositioning. Although CD SEMs have limitations, their combination of throughput, resolution, precision, ability to measure any feature of interest and automation has been unmatched in recent years. As geometries shrink in non-uniform ways and manufacturing processes become more complicated, questions continue to recur concerning the degree of correlation between post- develop and post-etch CD measurements. For the particularly critical processing steps of forming the transistor gate, the correlation of these measurements to subsequent electrical measurements is also of major concern. Can CD SEM measurement parameters be better optimized to improve these correlations. This study attempts to answer this question by gathering CD SEM raw waveforms and AFM linescans at gate develop and etch and comparing to electrical test measurements for an advanced device fabrication process. Optimal settings of the CD algorithms working on the waveforms are then sought to improve these correlations. The tradeoff with measurement precision will also be discussed.
© (2002) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Eric P. Solecky, Jason Mayer, and Charles N. Archie "Improving sub-150-nm lithography and etch CD-SEM correlations to AFM and electrical test", Proc. SPIE 4689, Metrology, Inspection, and Process Control for Microlithography XVI, (16 July 2002); https://doi.org/10.1117/12.473486
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