Adoption costs and hierarchy efficiency for 100 nm and beyond

Franklin M. Schellenberg

doi:10.1117/12.475691

12 July 2002 Adoption costs and hierarchy efficiency for 100 nm and beyond

Franklin M. Schellenberg

Proceedings Volume 4692, Design, Process Integration, and Characterization for Microelectronics; (2002) https://doi.org/10.1117/12.475691
Event: Design, Process Integration, and Characterization for Microelectronics, 2002, Santa Clara, CA, United States

Abstract

As new resolution enhancement techniques (RETs) are adopted to progress beyond 100 nm, the costs and benefits to the overall system of data handling must be viewed as an overall system. A 'state' approach to viewing flows has been very useful for determining insertion points for several RETs. We examine insertion for OPC, MPC, and dipole illumination. Future improvements in data volume can come from two sources - data compression schemes, and hierarchy injection methods. Data compression gives a very rapid, one-time relief of 80 percent or more for flat data volume problems, but this gain only occurs once. Recognition of redundant cells and patterns in the layout and injecting hierarchy that eliminates this redundancy is an approach that rarely gives such large one-time gains, but can be applied over and over for many generations. We conclude with a creative suggestion for data management that aids data volume transmission problems while suggesting a new approach to the management of hierarchy.

Citation Download Citation

Franklin M. Schellenberg "Adoption costs and hierarchy efficiency for 100 nm and beyond", Proc. SPIE 4692, Design, Process Integration, and Characterization for Microelectronics, (12 July 2002); https://doi.org/10.1117/12.475691

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