11 July 2002 Front-end wafer-level microsystem packaging technique with microcap array
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Abstract
Packaging represents a significant and expensive obstacle in commercializing microsystem technology (MST) devices such as micro-electro-mechanical systems (MEMS), micro-optical-electro-mechanical-systems (MOEMS), microsensors, microactuators and other micromachined devices. This paper describes a novel wafer level protection method for MST devices which facilitates improved manufacturing throughput and automation in package assembly, wafer level testing of devices, and enhanced device performance. The method involves the use of a wafer-sized micro-cap array. This array consists of an assortment of small caps molded onto a material with adjustable shapes and sizes to serve as protective structures against the hostile environments associated with packaging. It may also include modifications which enhance its adhesion to the MST wafer or increase the MST device function. Depending on the application, the micro-molded cap can be designed and modified to facilitate additional functions, such as optical, electrical, mechanical, and chemical functions, which are not easily achieved in the device by traditional means. The fabrication method, materials selection, and the compatibility of the micro cap device to conventional packaging process are discussed in this paper. The results of wafer-level micro cap packaging demonstrations are also presented.
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Yuh-Min Chiang, Yuh-Min Chiang, Mark Bachman, Mark Bachman, Guann-pyng Li, Guann-pyng Li, } "Front-end wafer-level microsystem packaging technique with microcap array", Proc. SPIE 4700, Smart Structures and Materials 2002: Smart Electronics, MEMS, and Nanotechnology, (11 July 2002); doi: 10.1117/12.475040; https://doi.org/10.1117/12.475040
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