Heat pulse optimization by SPICE simulation for transient thermography in silicon

Rajesh Gupta; Suneet Tuli

doi:10.1117/12.459615

15 March 2002 Heat pulse optimization by SPICE simulation for transient thermography in silicon

Rajesh Gupta, Suneet Tuli

Proceedings Volume 4710, Thermosense XXIV; (2002) https://doi.org/10.1117/12.459615
Event: AeroSense 2002, 2002, Orlando, FL, United States

Abstract

Silicon, apart from conventional integrated circuits, is also the basis for fabricating miniaturized 3-dimensional (3-D) mechanical structures. This paper presents a technique for the optimization of time duration of heat pulse required for transient thermography in silicon wafers. In the present work, a silicon diaphragm fabricated on one surface of a silicon wafer has been electro-thermally modeled as a 3-D Resistance Capacitance (RC) network. The region below the diaphragm was treated as a defect. Heat transfer by all three modes: conduction, convection and radiation has been taken into account. A C++ program generates the equivalent electrical circuit of the given sample, which was then directly simulated by SPICE (Simulation Program with Integrated Circuit Emphasis), a popular electrical circuit simulator. Experimental verification was performed on the silicon diaphragm sample. Prediction of a time duration in which temperature contrast of the sample reaches its maximum (saturation) value with minimum rise of sample temperature, is experimentally verified. This could be very useful in thermography situations where temperature rise should be no more than necessary to avoid potentially dangerous thermal stresses. Another possible use of the technique is for finding the heat flux of very short-pulsed heat sources.

Citation Download Citation

Rajesh Gupta and Suneet Tuli "Heat pulse optimization by SPICE simulation for transient thermography in silicon", Proc. SPIE 4710, Thermosense XXIV, (15 March 2002); https://doi.org/10.1117/12.459615

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