28 August 2002 Display bandwidth reduction via latched pixels and processing at the pixel
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The demand for displays with a large number of pixels is being driven by both military and commercial applications. Displays with very high information content are expected to have >1Gigapixels, requiring I/O bandwidth well beyond current integrated circuit technology, if display architectures continue as they have in the past. In this paper we present a concept based on latched pixels and data processing at the pixel level that could provide a significant reduction in display bandwidth.
© (2002) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Bruce Gnade, A. Akinwande, Ranganathan Shashidhar, James O. Larimer, "Display bandwidth reduction via latched pixels and processing at the pixel", Proc. SPIE 4712, Cockpit Displays IX: Displays for Defense Applications, (28 August 2002); doi: 10.1117/12.480931; https://doi.org/10.1117/12.480931


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