International SEMATECH (ISMT) is a consortium consisting of 13 leading semiconductor manufacturers from around the globe. Its objective is to develop the infrastructure necessary for its member companies to realize the International Technology Roadmap for Semiconductors (ITRS) through efficiencies of shared development resources and knowledge. The largest area of effort is lithography, recognized as a crucial enabler for microelectronics technology progress. Within the Lithography Division, most of the efforts center on mask-related issues. The development strategy at International SEMATCH will be presented and the interlock of lithography projects clarified. Because of the limited size of the mask production equipment market, the business case is weak for aggressive investment commensurate with the pace of the International Technology Roadmap for Semiconductors. With masks becoming the overwhelming component of lithography cost, new ways of reducing or eliminating mask costs are being explored. Will mask technology survive without a strong business case? Will the mask industry limit the growth of the semiconductor industry? Are advanced masks worth their escalating cost? An analysis of mask cost from the perspective of mask value imparted to the user is presented with examples and generic formulas for the reader to apply independently. A key part to the success for both International SEMATECH and the industry globally will be partnerships on both the local level between mask-maker and mask-user, and the macro level where global collaborations will be necessary to resolve technology development cost challenges.

The Next Generation Lithography (NGL) Mask Center of Competency (MCoC) has been developing mask technology to support all of the major next generation lithographies for several years. Cross-cutting process development has been applied to generate progress in both the membrane and reflective mask formats. The mask technology has been developed to early capability stage for all of the mask formats. Proximity x-ray masks, although only for certain niche applications, are a very developed mask format. This information has been used to produce electron beam projection masks, in both continuous membrane and stencil formats, and extreme ultraviolet lithography masks. In this paper, we discuss the status of the lithography technology development and the obstacles that remain between the current early development capability and the availability for manufacturing.

From detailed comparisons of stencil mask distortion measurements with Finite Element (FE) analyses the parameters of influence are well known. Most of them are under control of the mask manufacturer, such as the membrane stress level and the etching process. By means of FE analysis the different contributions may be classified. Some of the errors can be reduced if more stringent specifications of the SOI wafer are fulfilled, some of them may be reduced after pre-calculation. Reduction of the remaining placement errors can be achieved if specific means of an Ion Projection Lithography (IPL) tool are applied. These are mainly magnification and anamorphic corrections removing so-called global distortions. The remaining local distortions can be further reduced by applying the concept of thermal mask adjustment (THEMA).

Extreme ultraviolet lithography (EUVL) is one of the most promising technologies for wafer feature sizes of below 50nm. The illumination wavelength will be approximately 13.5nm and consequently no transmissive optics can be used for this soft X-ray light. For several years intensive research work has been performed in different programs mainly through EUV-LLC, ASET and PREUVE. This has resulted in providing solutions for the most critical tasks of EUVL - powerful sources, defect free mask blanks and environmentally stable optics of high reflectivity. During the development with EUV-LLC an engineering test stand for illumination has been built which will be a powerful tool for the development for EUVL masks. We have studied the patterning of a EUVL mask for process development and repair tests. The material was a standard Cr absorber (as used in production) and a SiO₂ buffer layer. The process investigation was focused on the dry etch stop behaviour of the etch processes and also on cleaning issues. The mask concept favoured today for EUVL masks is very similar to the masks used in production; consequently most work is performed on Cr as the absorber material and SiO₂ as the buffer material. From results presented in recent years we can surmise that Cr and TaN are at present the most promising candidates as absorber materials. However it is also known that it will be very difficult to develop an etch-bias free process for Cr. In this paper we shall present our results detailing the etch properties of Ta and TaN as an absorber material. TaN is shown to be a promising absorber material. In addition, the impact of mask properties on placement and bow has been investigated with finite element calculations.

First tests for cleaning Zerodur were accomplished. Because there are only a few cleaning methods suitable for the removal of small particles down to 50 nm we have investigated the behaviour of Zerodur in DI water and aqueous solutions.

Scniiconductor industry currently faces double-hold pains. One is the record-breaking semiconductor depression brought by the IT bubble collapse in the United States, and another is a brick wall called "Lithography Crisis" which stands in front of the technological progress. The former is that no growth of semiconductor market can be anticipated except household electric appliances because of the surplus of the optical communication infrastructure in the United States and sales reduction ofpersonai computer and cellular phone. The latter is that no cost effective solution can be found for next generation lithography, which has been searched for in a long time. Even in the semiconductor market of household electricity appliance, small or middle quantity production in multiple kinds is required to be extremely low cost. it is the new lithography called "LEEPL" (Low Energy Electron Beam Proximity Projection Lithography) that challenges to solve these cost issues. Thanks for simple tool configuration and small niask pattern area, LEEPL promises both tool and mask to be low cost.

The paper presents the use of the Linewidth Bias Monitor (LBM), the critical dimension (CD) uniformity mapping option of the ARIS 2li die-to-database mask inspection system, for incoming quality control (IQC) in the wafer fab. LBM is qualified for this purposes by comparing it's quantitative results with CD measurements. Masks, provided by different commercial vendors, are evaluated based on the LBM maps obtained during mask inspection. Mean-to-target and 3-sigma values are evaluated and compared.

Optical lithography simulation plays a decisive role in the development of technology for the manufacturing process of semiconductor devices. Its role in reticle inspection has only recently gained more attention. Filters determining which defects need repair and which ones can be ignored help set up the filter classes in inspection systems. These calculations are performed offline. In an effort to increase the accuracy of inspection it would be desirable to place the decision level as close to the actual process as possible. Therefore, an inspection system based on aerial images is a step in this direction. In addition, an optical simulator calculates from the aerial image the resist image. To do so very fast resist image models are needed (see figure 7). Quick models so far were restricted by accuracy and speed. In this paper a new very fast model will be presented that allows calculation of large areas suitable for inspection purposes. Finally a 'virtual inspection' system will be presented pinpointing at weak spots in the layout. In an effort to calculate larger areas of the resist in less time we had to take completely new approaches. They led us to analytical descriptions of the image transfer into the resist. Within these descriptions we begin in this first paper to investigate an approach based on the propagation of a top aerial image into the resist. The aerial image may come from calculations, as in the present article, or as well from measurements. The purpose of this article is to demonstrate the performance of the Fast Resist Model with respect to accuracy and time consumption. The limits of the current model are equally described.

In the photomask manufacturing, dry etch process is one of important process and the etch process mainly affects CD uniformity, skew, and Cr slope. We will present newly developed dry etcher system using TCP (transformer coupled plasma) source and its Cr etch performance. We will investigate the performance of TCP source for the uniformity, linearity, and loading effects. CD uniformity of 0.8 um Cr space pattern at 11 x 11 arrays with 135 x 135 mm² area is below 8 nm and 15 nm in 3 sigma in case of ZEP7000 and IP3500 as resists, respectively. The skew (ASI - ADI) linearity of clear and dark CDs from 0.4 um to 2 um is below 35 nm in case of IP3500. The Cr loading characteristics of TCP source is investigated and the etch process parameter dependence on the loading is verified.

In the past years the address grid for layout design, data preparation and exposure has been constantly reduced. Currently the ITRS Roadmap specifies 4nm Mask Design Grid for the 100nm technology node. The possibilities and challenges of pattern data processing for the new generation of Leica's Shaped Beam (SB) exposure tools, called SB350MW, are highlighted in this paper. In this context such issues like data volume, data processing time and fracture quality for the new 1nm pattern data format are discussed in detail.

Data Preparation has become another challenge to the many existing ones in mask making. This was mainly brought about by the advent of OPC and PSM layouts. The amount of data, doubling every year, has experienced a quantum leap. The more aggressive optical proximity correction the greater the leap. Hierarchical data treatment is one of the most powerful means to keep memory and CPU consumption in reasonable ranges. Only recently, however, has this technique acquired more public attention. In this paper we will present means to quantitatively measure the degree of hierarchy. In addition to global numbers local numbers turn out to be extremely helpful. They may serve the purpose to treat different branches of a tree, e.g. of a memory layout, by different approaches. Several alternatives exist, which have, to date, not been thoroughly investigated. One is a bottom-up attempt to treat cells starting with the most elementary cells. The other one is a top-down approach which lends itself to creating a new hierarchy tree. A trivial approach, widely used so far, is to flatten the layout. Conditions will be shown for the alternatives to work most effectively.

Minimising Across Retical Line width Variation is a continuous challenge for each resolution node. Having tight critical dimension (CD) uniformity for a large variety of pitches is even more challenging. The causes of the reticle errors originate mainly from writing reticles at the edge of the write-tool's capabilities, and from manufacturing at the edge of etching and processing capabilities. These various reticle errors will subsequently lead to non-uniformity effects on wafer level. The reticle errors can be compensated for using technologies similar to those used to correct for optical proximity effects at wafer level. The errors can be small effects in the nanometer range like write noise or larger effects of 10 nm to 100 nm on reticle level from etching. Many effects that we see on reticle will be made visible on the wafer after exposure on a Step & Scan system. To visualise system performance one can use specific techniques such as selection of lines that are on target. In addition, with extensive measurement these reticle errors can be subtracted and thus removed from the final wafer result. For the investigation use is made of a reticle, which has a variation of 35 pitches for four line widths of 100 nm, 130 nm, 150 nm, and 170 nm at 1X. The reticle underwent extensive measurements, and its characteristics are described from these measurements. In addition, some wafer results are shown.

A systematic attempt has been undertaken to investigate the printability of mask defects for 100nm lithography using 193nm wavelength. The main purpose is the study of soft defects (particles), but hard defects have been taken as a reference. A reticle is designed with programmed soft and chrome defects in cells with different densities. As soft defects resist dots are used. Printability is first assessed by simulation, using ProLith v7.0. Wafers are printed using QUASAR illumination and evaluated by a CD SEM. We demonstrate that aerial image simulations and AIS measurements can predict the qualitative trends in defect printability. A thorough quantitative analysis is presented.

Alternating phase-shifting mask (Alt.PSM) technology is the most effective approach to expand resolution limitation and expand the process window of lithography. Currently, etched quartz Alt.PSMs have been introduced not only for device development but also for production use. We have been supplying Alt.PSMs with Single trench + Undercut structures for the mass-production of KrF lithography and reported this structure is applicable for ArF lithography. (*1,2,3) On the other hand, we have introduced preliminary manufacturing results of the new Alt.PSM structure. (*3) This structure has the advantages, which are exempted from biasing issues and narrow chrome width limitations. (*4) In order to make sure the adaptability of this new Alt.PSM structure in mass-manufacturing, we started to investigate productivity for this structure. In this report, we will discuss about the feasibility study of manufacturing process and quality control which include CD performance results, alignment error tolerance evaluations and defect assurance evaluations.

At the 5th NGL Workshop, 28-3OAug200l , the IPL team, headed by Infineon Technologies, has presented overhead foils1 providing an overview of results as achieved with the Ion Projection Lithography Process Development Tool (PDT) which has been developed and realized by IMS-Vienna as part of the 1997-2001 European MEDEA project. Furthermore concepts for a full field (25X25mm2) ion projection stepper and it's wafer throughput potential have been presented.

With constant push for smaller and faster devices photo mask technology has become the most critical part of the entire integrated circuit (IC) production flow. Mask inspection and mask defect repair are increasingly important components of advanced photo mask technology. The low cost of mask manufacturing and the necessity of delivering photo masks to production floor in the shortest possible time require new photo mask specs and acceptance criteria. It is no longer economically viable to reject a photo mask because some mask anomalies were found, or repair all the defects detected by state of the art inspection tool. One should use a smart approach to separate tolerable mask anomalies from real mask defects that might negatively affect device yield. However, this is not a trivial task. With rising mask complexity (e.g., binary masks with aggressive optical proximity correction or phase-shifting masks (PSM) attenuated and alternating) and inspection and metrology tools running out of steam, new technologies such as the AIMS^TM and Virtual Stepper system must be used to sort nuisance mask defects from real ones. This will help to reduce the number of required defect repairs and shorten mask manufacturing cycle time. However, it is very difficult to utilize AIMS in the production environment because of its low operational speed; the Virtual Stepper software, in its turn, does rely on mask data captured by inspection/metrology hardware. In the case of phase masks, such as Attenuated PSM (especially high transmission EAPSM) and Alternating PSM, inspection tools are not able to accurately retrieve optical properties of mask materials and as a result defect analysis is becoming very difficult and is an unreliable task. A very common type of PSM defect that occur during mask manufacturing and repair processes are the so-called distributed defects such as gallium stains, riverbed pinhole clusters, and large chrome residuals (on EAPSM). It is very difficult to get accurate information about the transmittance and phase of these defects at actinic wavelength using inspection and metrology tools. With a simulation study one can reconstruct such mask defects, and by varying defect phase and transmission one can learn about the impact of such mask defects on printed wafers. In addition, lithography simulation helps to better understand how mask defects behave under different lithography process conditions. In our work we investigated several cases of distributed mask defects such as large chrome residuals and clustered pinholes on EAPSM. Based on our simulation, we found a relationship between photo mask defect transmissivity and resulting printed wafer critical dimension (CD) error. Simulated wafer results are presented in different forms: CD errors, process window, and Exposure- Defocus latitude changes. Conclusions about distributed defects printability have been made.

Since pattern transfer is done via photomasks, they are critical to any process development. As a rule of thumb photomask development must keep I 8 months ahead of the wafer development pace in order that chipmakers meet the ITRS technology roadmap. This roadmap has been difficult to follow for the mask industry. While Lithography toolmakers have been successful in implementing technology changes to enhance resolution and maintain process enhancements with Optical Proximity Corrections (OPC) and Phase Shift Masks (PSM). The mask equipment industry has been slow to implement a technology switch due to its size and technical risks involved (1). Inspection and Repair of defects, to a mask manufacturer, are critical steps to the disposition of advanced photo masks. Masks that have gone through many critical processing steps or have been damaged in a production facility can most of the time be brought "back into specification" by verification inspection and repair thus enhancing yields which help to reduce cost of ownership. Yields in manufacturing can be increased by increasing productivity and equipment capability. Thus test mask are an integral part of tool development, monitoring, evaluation and acceptance. The design of the mask must have features sizes and layouts that are relevant to the tool under test or development. In this work our goal was to create a design that can be used for development and evaluation of inspection and repair tools for the I OOnm and sub I OOnm technology nodes.

In 1992 the SIA published the first roadmap for semiconductors. Since then formal updates have been published in 1994, 1997, 1999 and now 2001. The 2001 ITRS update will not be published until Dec. 2001 so the tables in this document may change in the final release. The complete 2001 update can be found at: http:/'/pubiic.i.trsnet/ Sinc e the earliest days of the microelectronics industry, optical lithography has been the mainstream technology for volume manufacturing, and it is expected to continue as such through the 65 nm node, through the application of resolution enhancement techniqies such as off-axis illumination (OAI), phase shifting masks (PSM) and optical proximity corrections (OPC). In addition to resolution enhancement techniques, wavelength reductions (248 nnr 193 nm-) 157 nm) and lenses with increasing numerical apertures and decreasing aberrations will be required to extend the life of optical lithography. The requirements of the 45 nm node and beyond are viewed as beyond the capabilities of optical lithography. Extension of the Roadmap will require the development of next- generation lithography (NGL) technologies, such extreme ultraviolet lithography (EUV) and electron projection lithography (EPL). Because next generation lithographies will require the development of substantially new infrastructure, the costs of these technolo gies will put great pressure on manufacturing costs. Mask-making capability and cost escalation have become the major limiter to lithography progress. The roadmap acceleration has been very troublesome to the mask industry. CD control is falling behind the requirements of the chipmakers Where it might be said that the mask makers have been hit by the "perfect storm". First the two year cycle has reduced the available time for development, Secondly the gate widths post etch for MPU's have reduced even Ihster, And finally the mask industry has been asked to absorb the entire impact of the increased MEF associated with Low Kl Lithography. Mask equipment and process capabilities are in manufacturing for complex OPC and PSM.. Mask processes for Post 193nm technologies are in research and development.

CD-uniformity data of chemically amplified (CA) resists have been generated, by using a dynamically controlled multi-zone hotplate system, APB5000. The optimized baking procedure of the APB5000 system for Post Coat Bake (PCB) and Post Exposure Bake (PEB) is characterized by a maximum in the total temperature range on a 6025 mask substrate surface of 0.5 degree(s)C during the heat-up ramping and smaller than 0.2 degree(s)C at the set-point temperature of 90 degree(s)C. In this experiment CD-uniformity for isolated lines was improved to 7.8nm, compared to 13nm when using conventional baking systems. Additionally, a compensation method based on the baking processes is presented to further decrease the CD- uniformity range of CA-resists. Derived from CD-uniformity data measurements, a local temperature variation from the optimized baking strategy of the APB5000 system is used to compensate CD-errors caused by other process steps. In this experiment the result of such a measure showed a 40% improvement of the CD-uniformity range for dense lines from 14.2nm to 8.0nm.

The monitoring of defects on photomasks is becoming increasingly critical with ever decreasing feature sizes and higher mask-error-enhancement factors. This makes the characterization and a thorough understanding of the origin of different defect types essential in improving the first- pass defect level in a process. Two complementary approaches are presented, which are used to run an effective defect density engineering group, to aid in the production of high-end masks (equals 0.14 technology PSM). Firstly, an in-depth investigation of all defect- related reject masks is carried out. This includes SEM review, classification and storage of all defect - related information in a database. This allows the causes of defect- related rejection to be monitored. Secondly, a classical, in-line-monitoring concept is implemented. Here, an inspection and review is carried out on a regular basis, after each of the process steps involved in the production of high-end masks. For continuity and to ensure that all process steps are capable of handling the most challenging of masks, the most critical mask of any, given technology is used for all in-line monitoring. This gives a real, online status for every process and rapidly helps to identify potential problems very early.

Taking the challenge of Moore's Law production of lCs crosses the lOOnm borderline for gate lengths. The feature size and the ultra large scale integration are not yet limited by physics but by the performance of the manufacturing systems. The capability of i.e. e-beam mask writers is determined to an increasing extent by environmental influences. Achieving high-level productivity measuring and analysis of these disturbances, and thereby the quality of the site, is taking on ever more significance. Taking the advantage of the monitoring data, future pattern fidelity requirements can be obtained by implementing both passive and active cancelling methods where needed. Although semiconductor production takes place in well controlled cleanrooms, data of several variables are not acquired permanently. In this paper we present within the framework of a new 50kV mask writer installation the benefit of an environmental monitoring system that is capable of observing magnetic field fluctuations and feedback its measurement results to an active magnetic cancellation. Additionally floor vibration data are acquired by this tool.

We report on investigations and calibrations of chrome on quartz 5' test reticles with periodic line structures which are applied for qualification of optical performance of microlithographic lenses. The measurements are focused on the precise determination of the line-to-space ratio of the test grid structures which is a necessary input information for the objective lens qualification procedure applied. Calibrations of linewidths and line-to-space ratios of the test structures with nominal CD values between 280 nm and 600 nm are mainly performed with a special low-voltage scanning electron microscope (SEM) supported by optical transmission microscopy calibrations on a small number of all test structures to be measured. The requirements on the measurement uncertainties of the line-to-space ratios are about 5%. In addition to the CD calibrations, investigations were started to estimate the influence of e-beam induced carbon deposition on the mask on the objective lens imaging properties.

Optical metrology tools have been used very successfully for measuring photomasks. The 90nm node presents new challenges with the requirement to measure dense features with arbitrary line and space widths. This paper presents performance of the Optical Proximity CD Algorithm on the new 244nm DUV optical metrology tool, the KMS100. Results for short and long-term precision, distortion, system error and xy-bias for isolated and dense line/space arrays are presented. The system is demonstrated to be highly linear and largely insensitive to the influence of OPE while maintaining high precision and repeatability.

To keep pace with continuously shrinking design rules for masks and reticles Leica Microsystems has developed the new mask metrology tool LMS IPRO2. It is designed to measure pattern placement and CDs in transmitted light at i-line (365nm) illumination. Details on improvements over the previous system and performance data from the beta-site system are presented. The step to a shorter illumination wavelength leads to a better optical resolution power resulting in an improved edge detection. Transmitted light illumination enables to use the tool for CD measurement on quartz and phase shift masks.

Critical Dimension fidelity continues to be one of the key driving parameters defining photomask quality and printing performance. The present advanced optical CD metrology systems, operating at i-line, will very soon be challenged as viable tools owing to their restricted resolution and measurement linearity impact on the ability to produce repeatable measurements. Alternative measurement technologies such as CD-SEM and -AFM have started to appear, but are also not without tier concerns in the field of reticle CD metrology. This paper introduces a new optical metrology system (MueTec </M5k>/) operating at DUV wavelength (248nm), which has been specifically designed to meet the resolution and measurement repeatability requirements of reticle manufacture at the 130nm and 100nm nodes. The system is based upon a specially designed mechanical-optical platform for maximum stability and very advanced optical, illumination, alignment and software systems. The at wavelength operation of this system also makes it an ideal platform for defect printability analysis and review. The system is currently part of a European Commission funded assessment project (IST-2000-28086: McD'OR) to develop a testing strategy to verify the system performance, agree on equipment specifications and demonstrate its capability on advanced production reticles - including long-term reliability. It is the preliminary results from this evaluation that are presented here.

Lithography at its limit of resolution is a highly non- linear pattern transfer process. Typically the shapes of printed features deviate considerably from their corresponding features in the layout. This deviation is known as Optical Proximity Effect, and its correction Optical Proximity effect Correction or OPC. Although many other so-called optical enhancement technologies are applied to cope with the issues of lithography at its limit of resolution, almost none of these can re-store the linearity of the pattern transfer. Hence fully functional OPC has become a very basic requirement for current and future lithography processes. In general, proximity effects are two-dimensional (2d) effects. Thus any measurement of proximity effects or any characterization of the effectiveness of OPC has to be two- dimensional. As OPC modifies shapes in the data for mask writing in a way to compensate for the expected proximity effects of the following processing steps, parameters describing the particular OPC-mask quality is a major concern. One-dimensional mask specifications, such as linewidth mean-to-target and uniformity, pattern placement, and maximum size of a tolerable defect, are not sufficient anymore to completely describe the functionality of a given mask for OPC. Two-dimensional mask specifications need to be evaluated. We present in this paper a basic concept for 2d metrology. Examples for 2d measurements to assess the effectiveness of OPC are given by the application of an SEM Image Analysis tool to an advanced 130nm process.

A new die-to-database reticle inspection system has been developed to meet the production requirements for 130nm node 4x reticles, as well as, the early inspection requirements for 100nm node 4x reticles. This new system is based on the TeraStar platform¹ developed recently by KLA-Tencor Corporation for high performance die-to-die and STARlight inspection of 130nm node reticles. The TeraStar platform uses high-NA triple-beam scanning laser optics for high throughput. The platform also includes a new generation of defect detection algorithms and image processing hardware to inspect, with high sensitivity and low false detections, the small linewidths, aggressive OPC, and advanced EPSM 4x reticles characteristic of the 130nm node. The platform further includes the TeraPro concurrent STARlight and die- to-die inspection mode for exceptional productivity. The necessary database elements have now been developed and added to the TeraStar platform, to give it die-to-database inspection capability. A new data format along with new data preparation, data rendering, and data modeling algorithms have been developed to allow high precision database matching with the optical image for exceptional die-to- database performance. The TeraPro high productivity features of the TeraStar platform have been extended to the die-to- database mode providing the opportunity to use STARlight and die-to-database modes concurrently. The system design and in-house test results are discussed.

The paper presents results of a thorough study using the UV- based die-to-database mask inspection system ARIS100i for the inspection of alternating phase shifting masks (AAPSM) designed for KrF (248nm) technology. A specifically designed test mask was used to investigate sensitivity limitations of the i-line tool. Main focus is on phase errors, which were treated as a function of defect size, phase, and mask location.

In order to extend the life of DUV lithography to the 130 nm design rule and below, optical proximity correction (OPC) and phase shift masks (PSM) have become increasingly common. The implementation of low k lithography in IC production requires inspection systems with smaller linewidth capability and higher sensitivity to obtain high yields in advanced reticle production. This paradigm presents greater inspection challenges for current UV tools. When inspections are run on advanced reticles on current tools, the number of false and nuisance defect detections are so high as to make inspecting these reticles unmanageable. The amount of desense required to bring false and nuisance detections down also causes real defects to be missed. The TeraStar SLF27 is the next generation reticle inspection tool from KLA-Tencor. The TeraStar addresses these problems with new algorithms that allow inspection of OPC features without desensing the detectors. Complementing this are triple-beam optics and the ability to run pattern and STARlight inspections concurrently giving a net gain in the throughput and productivity of the tool. Here we present the first results from the use of the TeraStar in a production environment.

Reticle pinhole defects below 200nm are problematic from several standpoints. The wafer manufacturer presents a specification to the reticle producer, who in turn charges the inspection tool vendors with the task of detecting pinholes of a given size. The measurement of these pinholes, especially on programmed defect test masks, becomes critical to the success of this flow. Measuring the size of these small pinholes using the current SEM method often produces inconsistent results when compared to pinhole printability. Early studies have suggested that since the SEM measures only the top surface of the pinhole, the measurement does not account for edge wall angle and partial filling which reduces the pinhole transmission and subsequent printability. This investigation focuses on several transmitted light approaches for reticle pinhole measurement on programmed defect masks. An attempt to correlate these methods back to traditional SEM and optical sizing methods will also be attempted.

Nanomachining has recently been introduced as a new option for the repair of photomasks. The RAVE nm1300 system is a high precision system for subtractive removal of opaque mask defects. The first such system was installed at the Infineon Mask House in Munich, Germany. This paper presents the results of the acceptance testing. Programmed pattern defects on binary chrome on glass masks, alternating phase shifting masks and both 248nm and 193nm halftone phase shifting masks were used for these tests. Some examples of carbon patch trimming, sequential defect removing as well as repairing of 'non-removable' particles and irregularly shaped quartz bump defects demonstrate the unique capabilities of the tool.

Fluorescence microscopy was introduced as a low cost contamination-free method for rapid quality assessment of an imprint process. An optical microscope equipped with a UV- light source was used and the polymer for imprint was labeled with a fluorescent dye, based on perylene- tetracarboxylic acid dianhydride. The fluorescence images were compared with SEM measurements as well as profilometer data. Fluorescence microscopy was successfully applied to detect sticking of the polymer, typical flow defects like filling deficiencies and uniformity of the imprint depth.