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16 August 2002 Reticle processing induced proximity effects
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Proceedings Volume 4764, 18th European Conference on Mask Technology for Integrated Circuits and Microcomponents; (2002) https://doi.org/10.1117/12.479335
Event: 18th European Mask Conference on Mask Technology for Integrated Circuits and Micro-Components, 2002, Munich-Unterhaching, Germany
Abstract
Minimising Across Retical Line width Variation is a continuous challenge for each resolution node. Having tight critical dimension (CD) uniformity for a large variety of pitches is even more challenging. The causes of the reticle errors originate mainly from writing reticles at the edge of the write-tool's capabilities, and from manufacturing at the edge of etching and processing capabilities. These various reticle errors will subsequently lead to non-uniformity effects on wafer level. The reticle errors can be compensated for using technologies similar to those used to correct for optical proximity effects at wafer level. The errors can be small effects in the nanometer range like write noise or larger effects of 10 nm to 100 nm on reticle level from etching. Many effects that we see on reticle will be made visible on the wafer after exposure on a Step & Scan system. To visualise system performance one can use specific techniques such as selection of lines that are on target. In addition, with extensive measurement these reticle errors can be subtracted and thus removed from the final wafer result. For the investigation use is made of a reticle, which has a variation of 35 pitches for four line widths of 100 nm, 130 nm, 150 nm, and 170 nm at 1X. The reticle underwent extensive measurements, and its characteristics are described from these measurements. In addition, some wafer results are shown.
© (2002) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Maurice Janssen, Robert de Kruif, and Ton Kiers "Reticle processing induced proximity effects", Proc. SPIE 4764, 18th European Conference on Mask Technology for Integrated Circuits and Microcomponents, (16 August 2002); https://doi.org/10.1117/12.479335
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