Design of a hybrid prefix adder for nonuniform input arrival times

Youngmoon Choi; Earl E. Swartzlander Jr.

doi:10.1117/12.452040

6 December 2002 Design of a hybrid prefix adder for nonuniform input arrival times

Youngmoon Choi, Earl E. Swartzlander Jr.

Proceedings Volume 4791, Advanced Signal Processing Algorithms, Architectures, and Implementations XII; (2002) https://doi.org/10.1117/12.452040
Event: International Symposium on Optical Science and Technology, 2002, Seattle, WA, United States

Abstract

This paper examines the design of a hybrid prefix adder under the condition of non-uniform input signal arrival. This is encountered in the final adder for fast parallel multipliers, which use column compression reduction. The prefix graph scheme efficiently accommodates the non-uniform arrival times. Rules are presented for designing hybrid prefix adders under such conditions. This rule produces adders which are faster and less complex than previous work.

Citation Download Citation

Youngmoon Choi and Earl E. Swartzlander Jr. "Design of a hybrid prefix adder for nonuniform input arrival times", Proc. SPIE 4791, Advanced Signal Processing Algorithms, Architectures, and Implementations XII, (6 December 2002); https://doi.org/10.1117/12.452040

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