30 January 2003 On the accuracy and computational efficiency of physical simulators used for characterizing ultra-small gate-length FETs
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Abstract
A rigorous two-dimensional physical device simulator is developed to characterize the operation of ultra-small and highly doped semiconductor devices. To allow a better understanding of the device behavior, the physical phenomena which are taking place inside these devices are accurately modeled and included in the simulator. Implicit and explicit numerical schemes are applied to self-consistently solve the model equations and the effects of both schemes on the computational efficiency of the simulator are discussed. Finally, the obtained results from the simulator are compared with experimental characteristics of a device with similar structure.
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Ali Abou-Elnour, Ali Abou-Elnour, "On the accuracy and computational efficiency of physical simulators used for characterizing ultra-small gate-length FETs", Proc. SPIE 4793, Mathematics of Data/Image Coding, Compression, and Encryption V, with Applications, (30 January 2003); doi: 10.1117/12.463652; https://doi.org/10.1117/12.463652
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