3.2-Gb/s VCSEL driver implemented in 0.18-um CMOS

Alan E.L. Chuah; Michael B. Venditti; Fei Liu; David V. Plant

doi:10.1117/12.474329

17 February 2003 A 3.2 Gbps VCSEL driver implemented in 0.18μm CMOS

Alan E.L. Chuah, Michael B. Venditti, Fei Liu, David V. Plant

Proceedings Volume 4833, Applications of Photonic Technology 5; (2003) https://doi.org/10.1117/12.474329
Event: Applications of Photonic Technology 5, 2002, Quebec City, Canada

Abstract

We report on the performance of a 3.2 Gb/s VCSEL driver implemented in foundry n-well 0.18μm CMOS technology. The VCSEL driver utilizes a novel push-pull circuit topology that pushes and pulls modulation current into and out of the VCSEL cavity thus producing symmetric rising and falling edges. Using a commercial VCSEL with a threshold current of 1.2 mA and a slope efficiency of 0.3 mW/mA, the circuit was operated at 1.25, 2.5 and 3.2 Gb/s and produced 2.5 mW of average optical power.

Citation Download Citation

Alan E.L. Chuah, Michael B. Venditti, Fei Liu, and David V. Plant "A 3.2 Gbps VCSEL driver implemented in 0.18μm CMOS", Proc. SPIE 4833, Applications of Photonic Technology 5, (17 February 2003); https://doi.org/10.1117/12.474329

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