Translator Disclaimer
24 December 2002 Large area visible arrays: performance of hybrid and monolithic alternatives
Author Affiliations +
Abstract
CMOS-based imaging system-on-chip (i-SoC) technology is successfully producing large monolithic and hybrid FPAs that are superior in many respects to competing CCD-based imaging sensors. The hybrid approach produces visible 2048 by 2048 FPAs with <6 e- read noise and quantum efficiency above 80% from 400 nm to 920 nm; 4096 by 4096 mosaics are now being developed. The monolithic approach produces visible 12-bit imaging system-on-chips such as a 1936 by 1088 with higher quantum efficiency than mainstream CCDs, <25 e- read noise, <0.02% fixed pattern noise, automatic identification and replacement of defective pixels, black-level clamping, total power dissipation of only 180 mW, and various programmable features. Several successors having ≥12 Mpixels are in development. In both cases low-light-level performance is boosted by coupling the sensors to image intensifiers.
© (2002) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Lester J. Kozlowski, Yibin Bai, M. Loose, Atul B. Joshi, Gary W. Hughes, and James D. Garnett "Large area visible arrays: performance of hybrid and monolithic alternatives", Proc. SPIE 4836, Survey and Other Telescope Technologies and Discoveries, (24 December 2002); https://doi.org/10.1117/12.456758
PROCEEDINGS
13 PAGES


SHARE
Advertisement
Advertisement
RELATED CONTENT

The key technology and research progress of CMOS image sensor
Proceedings of SPIE (February 02 2009)
Notch and large-area CCD imagers
Proceedings of SPIE (July 01 1991)
Applications of CMOS image sensors: state-of-the-art
Proceedings of SPIE (November 01 2012)
Smart FPA's: are they worth the effort?
Proceedings of SPIE (October 03 2006)
Intelligent CMOS imaging
Proceedings of SPIE (April 10 1995)

Back to Top