7 March 2003 SIDECAR low-power control ASIC for focal plane arrays including A/D conversion and bias generation
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Large two-dimensional imaging arrays, spanning infrared focal plane arrays through visible CCDs, usually require extensive support electronics. We present an application specific integrated circuit (ASIC) that combines, on a single chip, all necessary functions to operate CMOS-based focal plane arrays and provide digital data from 12 to 16 bits. The interface to the external world is completely digital, thus eliminating the complexity of dealing with sensitive analog voltages. The ASIC's first application is for use with the HAWAII-2RG (a 2048 x 2048 multiplexer specifically optimized for the Next Generation Space Telescope). Due to its flexibility, it can control other FPAs and SCAs not requiring clocks or biases higher than 3.3 V. The low-power, system-on-chip controller comprises a 16-bit microcontroller, program and data memory, clock generator, bias generator, 36 programmable gain amplifiers (0 to 27 dB), thirty-six 12-bit 10 MHz A/D converters, thirty-six 16-bit 500 kHz A/D converters, glue logic and programmable I/O pads. When configured for NGST, we estimate ≤ 8.4 mW continuous power for the 2k x 2k FPA and ASIC. The programmable ASIC, dubbed SIDECAR, for System for Image Digitization, Enhancement, Control And Retrieval, is likely an optimum "back-end" solution for other high-performance instruments.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Markus Loose, L. Lewyn, Hakan Durmus, James D. Garnett, Donald N. B. Hall, Atul B. Joshi, Lester J. Kozlowski, Ilia Ovsiannikov, "SIDECAR low-power control ASIC for focal plane arrays including A/D conversion and bias generation", Proc. SPIE 4841, Instrument Design and Performance for Optical/Infrared Ground-based Telescopes, (7 March 2003); doi: 10.1117/12.462601; https://doi.org/10.1117/12.462601


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