2 July 2002 Reconfigurable logic design case
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Proceedings Volume 4867, Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications IV; (2002) https://doi.org/10.1117/12.469748
Event: ITCom 2002: The Convergence of Information Technologies and Communications, 2002, Boston, MA, United States
Abstract
This design case identifies generalizable features of a course-grained reconfigurable FPGA, Chameleon's reconfigurable platform. An FFT is used to identify typical design practices, problems, and solutions in targeting such a platform. This paper focuses on datapath mapping, separating it into functional design and placement of reconfigurable resources. In addition to exploring the design methodology, it analyzes numerical artifacts, demonstrates efficient packing of the data path, and highlights differences from ASIC design.
© (2002) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Shing-Fat Fred Ma, John Knight, Calvin Plett, "Reconfigurable logic design case", Proc. SPIE 4867, Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications IV, (2 July 2002); doi: 10.1117/12.469748; https://doi.org/10.1117/12.469748
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