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10 September 2002 Silicon microchannel array based on MEMS process
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Abstract
This paper reports on a silicon mcrochannel arrays prepared based on bulk-micromachining technology, dry etching technology and electrochemical process respectively. In dry etching, a silicon microchannel plate (Si-MCP), with 15-30 aspect ratio of the microchannel, 6-20 µm, 6-8 µm space and 150-300µm depth, were prepared by Inductively Coupled Plasma (ICP). The phenomenon ofplasma etching lag and the morphology ofthe microchannel array in dry processing were analyzed and discussed.In wet process, both p-type and n-type silicon was selected as the substrate for microchannel arrays. A inducing pit arrays was first prepared by oxidation, lithography, KOH etching, and then a square channel arrays that has 4 µm length of side and 2 µm space were formed by electrochemical etching in hydrofluoric acid in three poles electrolyzing cell, which can yield straight holes with high aspect ratio. The electrochemical mechanism of silicon anisotropy etching, the parameters of three pole electrolyzing cell, and the inducing pit and channel morphology were investigated and discussed. The results shows that the high aspect ratio of silicon microchannel arrays can be made by both dry and wet etching processes. The ICP process yield a microchannel arrays with uneven, re-entrant, notched and ripples surface within the channel. The electrochemical process for silicon microchannel arrays has lower cost than ICP process.
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Qingduo Duanmu, Ye Li, Delong Jiang, Yanjun Gao, Lichen Fu, and Jingquan Tian "Silicon microchannel array based on MEMS process", Proc. SPIE 4928, MEMS/MOEMS Technologies and Applications, (10 September 2002); https://doi.org/10.1117/12.483179
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