1 August 2003 Design of a binary correlator component and its integration in round-about architecture for real-time motion measurement
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Proceedings Volume 4948, 25th International Congress on High-Speed Photography and Photonics; (2003) https://doi.org/10.1117/12.516951
Event: 25th international Congress on High-Speed photography and Photonics, 2002, Beaune, France
Abstract
In this paper we present a hardware design, built from scalable components named binary correlators, to exploit in real time the high-speed image grabbing in PIV (Particle Image Velocimetry). PIV can produce instantaneous measurements on a full flow field if real time processing can be reached. Thus, a specific hardware system is required. This hardware system is designed to allow the component scalability by using hardware templates which is grouped to form a binary correlator. Moreover, binary correlators are suitable as processing units and can be integrated in a specific architecture named Round-About. Real time measurement can be attained with only one FPGA.
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Julien Dubois, Julien Dubois, Gerard Jacquet, Gerard Jacquet, Guy Motyl, Guy Motyl, Viktor Fischer, Viktor Fischer, Alain Aubert, Alain Aubert, } "Design of a binary correlator component and its integration in round-about architecture for real-time motion measurement", Proc. SPIE 4948, 25th International Congress on High-Speed Photography and Photonics, (1 August 2003); doi: 10.1117/12.516951; https://doi.org/10.1117/12.516951
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