15 January 2003 Chip-on-flex with 5-micron features
Author Affiliations +
Proceedings Volume 4979, Micromachining and Microfabrication Process Technology VIII; (2003); doi: 10.1117/12.478238
Event: Micromachining and Microfabrication, 2003, San Jose, CA, United States
A new module packaging method is proposed for electronic systems comprising a motherboard and integrated circuit (IC) chips. Pitches of 10 microns for conductive traces, and 100 microns for bonding pads are achievable. The enabling technology is glass panel manufacture, using equipment and techniques similar to those employed for fabricating liquid crystal display (LCD) panels. Flexible circuits are produced on a glass carrier using a release layer, and the carrier is removed after most of the processing is complete. IC chips are stud bumped and flip chip bonded to wells filled with solder, provided on the flexible circuit. The fabrication density achievable with wafer level packaging (WLP) using silicon wafers is substantially more than is needed for module packaging, as described herein. It is possible to provide WLP performance on glass at a much lower cost. The conductor features on glass are fine enough for the most demanding packaging and assembly techniques. The lowered cost of glass applies to the interconnection circuit plus assembly, test and rework. A test method called Tester-On-Board (TOB) is proposed, employing special-purpose test chips that are directly mounted in the system and mimic the capabilities of external testers. Methods for hermetic sealing, electromagnetic screening, and high-density off-board connections are also proposed.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Peter C. Salmon, "Chip-on-flex with 5-micron features", Proc. SPIE 4979, Micromachining and Microfabrication Process Technology VIII, (15 January 2003); doi: 10.1117/12.478238; https://doi.org/10.1117/12.478238






Semiconducting wafers

Flexible circuits


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