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30 May 2003 Fabrication of silicon-on-insulator adiabatic tapers for low-loss optical interconnection of photonic devices
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Proceedings Volume 4997, Photonics Packaging and Integration III; (2003)
Event: Integrated Optoelectronics Devices, 2003, San Jose, CA, United States
Steps are described for fabricating, preparing, and assembling pigtailed optical mode converters being developed for low loss coupling of optical fibers to high index contrast waveguide devices and arrays. The mode converters comprise adiabatic waveguide tapers fabricated from silicon-on-insulator (SOI) wafers, utilizing the silicon device layer as a waveguide core and the buried oxide as the underlying clad. Polished facets comprise the input and output ends of the tapers. The mode shape at the input typically matches that of an SMF-28 fiber, while the output ends can be sized to match various waveguide device mode shapes, typically ranging from 1 to 5 microns with aspect ratios as high as 5:1. Semiconductor planar processing techniques are employed to form the tapers upon commercial SOI wafers. An additional oxide layer is deposited upon the tapers to provide a symmetric clad around the silicon. Once fabricated, the wafers are diced into chips containing rows of tapers. The input and output facets are then lapped and polished, using a precision end point process, after which an anti reflective (AR) coating is applied. Following AR coating the chips are aligned and bonded to either single fibers or V-groove fiber arrays, creating the final pigtailed mode converter device. The insertion loss for completed mode converters ranges from 0.5 to 1 dB depending upon output facet size and asymmetry.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
John J. Fijol, Eugene E. Fike, Philip B. Keating, Donald Gilbody, John J. LeBlanc, Stuart A. Jacobson, William J. Kessler, and Michael B. Frish "Fabrication of silicon-on-insulator adiabatic tapers for low-loss optical interconnection of photonic devices", Proc. SPIE 4997, Photonics Packaging and Integration III, (30 May 2003);

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