14 April 2003 Novel development tool for software pipeline optimization for VLIW-DSPs used in real-time image processing
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Although the hardware platform is often seen as the most important element of real-time imaging systems, software optimization can also provide remarkable reduction of overall computational costs. The recommended code development flow for digital signal processors based on the TMS320C6000(TM) architecture usually involves three phases: development of C code, refinement of C code, and programming linear assembly code. Each step requires a different level of knowledge of processor internals. The developer is not directly involved in the automatic scheduling process. In some cases, however, this may result in unacceptable code performance. A better solution can be achieved by scheduling the assembly code by hand. Unfortunately, scheduling of software pipelines by hand not only requires expert skills but is also time consuming, and moreover, prone to errors. To overcome these drawbacks we have designed an innovative development tool - the Software Pipeline Optimization Tool (SPOT(TM)). The SPOT is based on visualization of the scheduled assembly code by a two-dimensional interactive schedule editor, which is equipped with feedback mechanisms deduced from analysis of data dependencies and resource allocation conflicts. The paper addresses optimization techniques available by the application of the SPOT. Furthermore, the benefit of the SPOT is documented by more than 20 optimized image processing algorithms.
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Johannes Fuertler, Johannes Fuertler, Konrad J. Mayer, Konrad J. Mayer, Werner Krattenthaler, Werner Krattenthaler, Ivan Bajla, Ivan Bajla, } "Novel development tool for software pipeline optimization for VLIW-DSPs used in real-time image processing", Proc. SPIE 5012, Real-Time Imaging VII, (14 April 2003); doi: 10.1117/12.477491; https://doi.org/10.1117/12.477491

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