Translator Disclaimer
2 June 2003 New way of handling dimensional measurement results for integrated circuit technology
Author Affiliations +
Abstract
The production of state-of-the-art integrated circuits requires better dimensional metrology than is currently available. The reliance on precision alone will not deliver the needed, close to atomic level performance. Without thorough analysis of the accuracy and precision performance of the metrology tools it is impossible to fulfill the requirements dimensional metrology has to meet. WIth the implementation and use of the existing, internationally accepted and recommended guidelines for evaluating and expressing the results and uncertaintly of measurements these problems can be minimized and ultimately overcome. These guidelines spell out the proper way of dealign with measurment results and their use will uncover substantial hidden problems that hold back the performance of current metrology tools. Possibilities for further improvements will also present themselves. This paper describes the present and preferred way of handling dimensional measurement results for integrated circuit technology and gives a detailed list of possible errors and sources measurement inaccuracy and uncertainty found in scanning electron microscopes.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Andras E. Vladar, John S. Villarrubia, and Michael T. Postek "New way of handling dimensional measurement results for integrated circuit technology", Proc. SPIE 5038, Metrology, Inspection, and Process Control for Microlithography XVII, (2 June 2003); https://doi.org/10.1117/12.485021
PROCEEDINGS
10 PAGES


SHARE
Advertisement
Advertisement
RELATED CONTENT

Certain linewidth measurements
Proceedings of SPIE (May 31 1990)
Accuracy of Spatial Metrology
Proceedings of SPIE (July 18 1989)
Submicron calibration strategy for CD control
Proceedings of SPIE (September 12 1996)

Back to Top